| 数据搜索系统,热门电子元器件搜索 |
|
USB3300 数据表(PDF) 23 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
USB3300 数据表(HTML) 23 Page - Microchip Technology |
|
23 / 53 page ![]() 2014-2015 Microchip Technology Inc. DS00001783B-page 23 USB3300 6.1.4.9 USB Interrupt Enable Falling: Address = 10-12h (read), 10h (write), 11h (set), 12h (clear) 6.1.4.10 USB Interrupt Status Register: Address = 13h (read only with auto clear) 6.1.4.11 USB Interrupt Status: Address = 14h (read only with auto clear) Field Name Bit Default Description HostDisconnect Fall 0 1b Generate an interrupt event notification when Hostdisconnect changes from high to low. Applicable only in host mode. VbusValid Fall 1 1b Generate an interrupt event notification when Vbusvalid changes from high to low. SessValid Fall 2 1b Generate an interrupt event notification when SessValid changes from high to low. SessEnd Fall 3 1b Generate an interrupt event notification when SessEnd changes from high to low. IdGnd Fall 4 1b Generate an interrupt event notification when IdGnd changes from high to low. Reserved 7:5 0h Driven low. Field Name Bit Default Description HostDisconnect 0 0b Current value of the UTMI+ Hostdisconnect output. Applicable only in host mode. VbusValid 1 0b Current value of the UTMI+ Vbusvalid output. SessValid 2 0b Current value of the UTMI+ SessValid output. SessEnd 3 0b Current value of the UTMI+ SessEnd output. IdGnd 4 0b Current value of the UTMI+ IdGnd output. Reserved 7:5 0h Driven low. Field Name Bit Default Description HostDisconnect Latch 0 0b Set to 1b by the PHY when an unmasked event occurs on Hostdisconnect. Cleared when this register is read. Applicable only in host mode. VbusValid Latch 1 0b Set to 1b by the PHY when an unmasked event occurs on VbusValid. Cleared when this register is read. SessValid Latch 2 0b Set to 1b by the PHY when an unmasked event occurs on SessValid. Cleared when this register is read. SessEnd Latch 3 0b Set to 1b by the PHY when an unmasked event occurs on SessEnd. Cleared when this register is read. IdGnd Latch 4 0b Set to 1b by the PHY when an unmasked event occurs on IdGnd. Cleared when this register is read. Reserved 7:5 0h Driven low. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |