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USB3300 数据表(PDF) 25 Page - Microchip Technology |
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USB3300 数据表(HTML) 25 Page - Microchip Technology |
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25 / 53 page ![]() 2014-2015 Microchip Technology Inc. DS00001783B-page 25 USB3300 6.1.5.1 ULPI Register Write A ULPI register write operation is given in Figure 6-4. The TXD command with a register write DATA[7:6] = 10b is driven by the Link at T0. The register address is encoded into DATA[5:0] of the TXD CMD byte. To write to a register, the Link will wait until DIR is low, and at T0, drive the TXD CMD on the databus. At T2 the PHY will drive NXT high. On the next rising clock edge, T3, the Link will write the register data. At T4 the PHY will accept the register data and the Link will drive an Idle on the bus and drive STP high to signal the end of the data packet. Finally, at T5, the PHY will latch the data into the register and drive NXT low. The Link will pull STP low. NXT is used to control when the Link drives the register data on the bus. DIR is low throughout this transaction since the PHY is receiving data from the Link. STP is used to end the transaction and data is registered after the de-assertion of STP. After the write operation completes, the Link must drive a ULPI Idle (00h) on the data bus or the USB3300 may decode the bus value as a ULPI command. FIGURE 6-4: ULPI REGISTER WRITE DIR CLK DATA[7:0] STP NXT TXD CMD (reg write) Idle Reg Data[n] Idle ULPI Register Reg Data [n-1] Reg Data [n] T0 T1 T2 T3 T5 T4 T6 |
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