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A6985F 数据表(PDF) 52 Page - STMicroelectronics

部件名 A6985F
功能描述  38 V 500 mA synchronous step-down switching regulator
PDF  77 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

A6985F 数据表(HTML) 52 Page - STMicroelectronics

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Application notes
A6985F
52/77
DocID027738 Rev 2
As anticipated above, in SLAVE mode the internal oscillator operates at 250 kHz typ. but the
slope compensation is dimensioned accordingly with FSW resistors so, even if the A6985F
supports synchronization over the 275 kHz - 2 MHz frequency range, it is important to limit
the switching operation around a working point close to the selected frequency (FSW
resistor).
As a consequence, to guarantee the full output current capability and to prevent the
subharmonic oscillations the master must limit the driving frequency range within ± 20% of
the selected frequency.
A wider frequency range may generate subharmonic oscillation for duty > 50% or limit the
peak current capability (see IPK parameter in Table 5 on page 8) since the internal slope
compensation signal may be saturated.
7.6
Design of the power components
7.6.1
Input capacitor selection
The input capacitor voltage rating must be higher than the maximum input operating voltage
of the application. During the switching activity a pulsed current flows into the input capacitor
and so its RMS current capability must be selected accordingly with the application
conditions. Internal losses of the input filter depends on the ESR value so usually low ESR
capacitors (like multilayer ceramic capacitors) have higher RMS current capability. On the
other hand, given the RMS current value, lower ESR input filter has lower losses and so
contributes to higher conversion efficiency.
The maximum RMS input current flowing through the capacitor can be calculated as:
Equation 44
Where IOUT is the maximum DC output current, D is the duty cycles, is the efficiency. This
function has a maximum at D = 0.5 and, considering
 = 1, it is equal to IOUT/2.
In a specific application the range of possible duty cycles has to be considered in order to
find out the maximum RMS input current. The maximum and minimum duty cycles can be
calculated as:
Equation 45
Equation 46
Where
VHIGH_SIDE and VLOW_SIDE are the voltage drops across the embedded switches.
IRMS
IOUT
1
D
----

 D
----
=
DMAX
VOUT VLOWSIDE
+
VINMIN VLOWSIDE VHIGHSIDE
+
------------------------------------------------------------------------------------------------
=
DMIN
VOUT VLOWSIDE
+
VINMAX VLOWSIDE VHIGHSIDE
+
--------------------------------------------------------------------------------------------------
=



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