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A6985F 数据表(PDF) 49 Page - STMicroelectronics |
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A6985F 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 77 page ![]() DocID027738 Rev 2 49/77 A6985F Application notes 77 Figure 36 shows the same regulators working synchronized. The MASTER regulator (LX_5V trace) delivers the synchronization signal (SYNCH_3V3, SYNCH_5V pins are connected together) to the SLAVE device (LX_3V3). The SLAVE regulator works in phase with the synchronization signal which is out of phase with the MASTER switching operation. Figure 36. Two regulators synchronized Multiple A6985F devices can be synchronized to an external frequency signal fed to the SYNCH pin. In this case the regulator set is phased to the reference and all the devices will work with 0° phase shift. The frequency range of the synchronization signal is 275 kHz - 2 MHz and the minimum pulse width is 100 nsec (see Figure 37). Figure 37. Synchronization pulse definition Since the slope compensation contribution that is required to prevent subharmonic oscillations in peak current mode architecture depends on the switching frequency, it is important to select the same oscillator frequency for all regulators (all of them operate as SLAVE) as close as possible to the frequency of the reference signal (please refer to Table 6: fSW selection on page 11). As a consequence all the regulators have the same resistor value connected to the FSW pin, so the slope compensation is optimized |
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