Device description and block diagram

STCH02

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DocID028766 Rev 1

3FB

are approaching the cycle-by-cycle overcurrent setpoint.

4ZCD

Transformer's demagnetization sensing for the quasi resonant operation and

input/output voltage monitor. A negative-going edge triggers the MOSFET's turn-on.

The current sourced by the pin during MOSFET's ON-time is monitored to get an

image of the input voltage to the converter, in order to compensate the internal delay

of the current sensing circuit and achieve a CC regulation independent of the mains

voltage. Still, the pin voltage is sampled-and-held right at the end of transformer's

demagnetization to get an accurate image of the output voltage to be used for

overvoltage protection (OVP). Please note that the maximum IZCD sunk/sourced

current has to not exceed ± 3 mA (AMR) in the entire input voltage range. No

capacitor is allowed between the pin and the auxiliary winding of the transformer.

5

SENSE

Input to the PWM comparators. The current flowing in the MOSFET is sensed

through a resistor connected between the pin and GND. The resulting voltage is

compared with an internal reference (0.75 V max.) to determine the MOSFET's turn-

off. The pin is equipped with 380 ns blanking time after the gate drive output goes

high for improved noise immunity. If a second comparison level located at 1 V is

typ.).

6GND

Circuit ground reference and current return for both - the signal part of the IC and the

gate drive. All of the ground connections of the bias components should be tied to

the trace going to this pin and kept separate from any pulsed current return.

7

GD

A gate driver with a totem pole output stage for the external power MOSFET.

8VDD

Supply voltage of the device. An electrolytic capacitor, connected between this pin

and ground, is initially charged by the internal high voltage start-up generator. When

the device is running the same generator will keep it charged in case the voltage

supplied by the auxiliary winding is not sufficient. This feature is disabled in case

a protection is tripped. Sometimes a small bypass capacitor (0.1 µF typ.) connected

between the pin and GND might be useful to get a clean bias voltage for the signal

part of the IC.

Table 4. Pin functions (continued)

No.

Name

Function