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STCH02 数据表(PDF) 19 Page - STMicroelectronics

部件名 STCH02
功能描述  Offline PWM controller for ultra-low standby adapters
PDF  24 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STCH02 数据表(HTML) 19 Page - STMicroelectronics

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STCH02
Application information
24
Once the protection is tripped, the condition is maintained until VDD goes below VDDR restart
voltage. While it is disabled, however, no energy is coming from the self-supply circuit; and
the voltage on the VDD capacitor will drop down to VDDR restart voltage, before the VDD
capacitor is charged again and the device restarted (VDD-ON). Ultimately, this will result into
a low frequency intermittent operation (hiccup mode operation).
Figure 11. OVP function: timing diagram
3.11
Soft-start and starter block
The soft start feature is automatically implemented by the constant current block, as the
primary peak current will be limited from the voltage on the internal CC block capacitor.
During the start-up, as the output voltage is zero, the IC will start in the CC mode with no
high peak current operations. In this way the voltage on the output capacitor will increase
slowly and the soft-start feature will be ensured.
3.12
Hiccup mode OCP
The device is also protected against the short-circuit of the secondary rectifier, short-circuit
on the secondary winding or a hard-saturated flyback transformer. A comparator monitors
continuously the voltage on the RSENSE and activates protection circuitry if this voltage
exceeds the VOCP value (1 V typ. value).
To distinguish an actual malfunction from a disturbance (e.g.: induced during ESD tests), the
first time the comparator is tripped the protection circuit enters a “warning state”. If in the
subsequent switching cycle the comparator is not tripped, a temporary disturbance is
assumed and the protection logic will be reset in its idle state; if the comparator will be
tripped again a real malfunction is assumed and the device will be stopped.
Once the protection is tripped, the condition is maintained until VDD goes below VDDR restart
voltage. While it is disabled, however, no energy is coming from the self-supply circuit;
hence the voltage on the VDD capacitor will decay and cross the UVLO threshold after some



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