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STCH02 数据表(PDF) 13 Page - STMicroelectronics |
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STCH02 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 24 page ![]() DocID028766 Rev 1 13/24 STCH02 Application information 24 At converter power-down the system will the lose the regulation as soon as the input voltage falls below HVSTART. This prevents converter's restart attempts and ensures monotonic output voltage decay at system power-down. Figure 6. Timing diagram: normal power-up and power-down sequences 3.4 Zero current detection and triggering block The zero current detection (ZCD) and triggering blocks switch on the power MOSFET if a negative-going edge falling below 50 mV is applied to the ZCD pin. To do so, the triggering block must be previously armed by a positive-going edge exceeding 100 mV. This feature is used to detect transformer demagnetization for the QR operation, where the signal for the ZCD input is obtained from the transformer's auxiliary winding used also to supply the IC. The triggering block is blanked after the MOSFET's turn-off to prevent any negative-going edge that follows leakage inductance demagnetization from triggering the ZCD circuit erroneously. This blanking time is dependent on the voltage on the FB pin: it is TBLANK = 24 µs for VFB = 0.6 V, and decreases linearly down to TBLANK = 3.8 µs for VFB 1.65 V. The voltage on the pin is both top and bottom limited by a double clamp. The upper clamp is typically located at 3 V, while the lower clamp is located at -60 mV. The interface between the pin and the auxiliary winding will be a resistor divider. Its resistance ratio as well as the individual resistance values will be properly chosen (see Section 3.10: Overvoltage protection on page 18 and Section 3.7: Voltage feedforward block on page 16. |
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