ASM330LXH datasheet(29/56 Pages) STMICROELECTRONICS

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ASM330LXH

Digital interfaces

Data are transmitted in byte format (DATA). Each data transfer contains 8 bits. The number

of bytes transferred per transfer is unlimited. Data is transferred with the Most Significant bit

(MSb) first. If a receiver can’t receive another complete byte of data until it has performed

some other function, it can hold the clock line, SCL LOW to force the transmitter into a wait

state. Data transfer only continues when the receiver is ready for another byte and releases

the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to

receive because it is performing some real-time function) the data line must be left HIGH by

the slave. The master can then abort the transfer. A LOW-to-HIGH transition on the SDA

line while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be

terminated by the generation of a STOP (SP) condition.

In the presented communication format MAK is Master acknowledge and NMAK is No

Master Acknowledge.

4.2

SPI bus interface

The ASM330LXH SPI is a bus slave. The SPI allows writing to and reading from the

registers of the device. It is compliant with SPI transfer mode 3 and SPI transfer mode 0.

The serial interface interacts with the outside world with 4 wires: CS, SPC, SDI and SDO.

Figure 16. Read and write protocol

CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of

the transmission and goes back high at the end. SPC is the serial port clock and it is

controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI and

SDO are respectively the serial port data input and output. Those lines are driven at the

falling edge of SPC and should be captured at the rising edge of SPC.

Table 15. Transfer when master is receiving (reading) one byte of data from slave

Master

SAD + W

SUB

SAD + R

NMAK

Slave

SAK

DATA

Table 16. Transfer when master is receiving (reading) multiple bytes of data from slave

Master ST SAD+W

SUB

SR SAD+R

MAK

NMAK SP

Slave

SAK

DATA

DAT

DATA

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