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STM32F479AI 数据表(PDF) 122 Page - STMicroelectronics |
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STM32F479AI 数据表(HTML) 122 Page - STMicroelectronics |
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122 / 208 page  Electrical characteristics STM32F479xx 122/208 DocID028010 Rev 2 Table 46. MIPI D-PHY AC characteristics LP mode and HS/LP transitions(1) 1. Guaranteed based on test during characterization. Symbol Parameter Conditions Min Typ Max Unit TLPX Transmitted length of any Low- Power state period -50 - - ns TCLK-PREPARE Time that the transmitter drives the Clock Lane LP-00 Line state immediately before the HS-0 Line state starting the HS transmission. -38 - 95 TCLK-PREPARE + TCLK-ZERO Time that the transmitter drives the HS-0 state prior to starting the clock. - 300 - - TCLK-PRE Time that the HS clock shall be driven by the transmitter prior to any associated Data Lane beginning the transition from LP to HS mode. -8 - - UI TCLK-POST Time that the transmitter continues to send HS clock after the last associated Data Lane has transitioned to LP Mode. -62+52*UI - - ns TCLK-TRAIL Time that the transmitter drives the HS-0 state after the last payload clock bit of an HS transmission burst. -60 - - THS-PREPARE Time that the transmitter drives the Data Lane LP-00 Line state immediately before the HS-0 Line state starting the HS transmission. - 40+4*UI - 85+6*UI THS-PREPARE + THS-ZERO THS-PREPARE+ Time that the transmitter drives the HS-0 state prior to transmitting the Sync sequence. - 145+10*UI - - THS-TRAIL Time that the transmitter drives the flipped differential state after last payload data bit of a HS transmission burst. - Max (n*8*UI, 60+n*4*UI) -- THS-EXIT Time that the transmitter drives LP-11 following a HS burst. - 100 - - TREOT 30%-85% rise time and fall time - - - 35 TEOT Transmitted time interval from the start of THS-TRAIL or TCLK-TRAIL, to the start of the LP-11 state following a HS burst. -- - 105+ n*12UI |
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