STM32F479AI datasheet(34/208 Pages) STMICROELECTRONICS

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Functional overview

STM32F479xx

34/208

DocID028010 Rev 2

2.22

Low-power modes

The devices support three low-power modes to achieve the best compromise between low

power consumption, short startup time and available wakeup sources:

•

Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can

wake up the CPU when an interrupt/event occurs.

•

Stop mode

The Stop mode achieves the lowest power consumption while retaining the contents of

SRAM and registers. All clocks in the 1.2 V domain are stopped, the PLL, the HSI RC

and the HSE crystal oscillators are disabled.

The voltage regulator can be put either in main regulator mode (MR) or in low-power

mode (LPR). Both modes can be configured as follows (see Table 5):

–

Normal mode (default mode when MR or LPR is enabled)

–

Under-drive mode.

The device can be woken up from the Stop mode by any of the EXTI line (the EXTI line

source can be one of the 16 external lines, the PVD output, the RTC alarm / wakeup /

tamper / time stamp events, the USB OTG FS/HS wakeup or the Ethernet wakeup).

•

Standby mode

The Standby mode is used to achieve the lowest power consumption. The internal

voltage regulator is switched off so that the entire 1.2 V domain is powered off. The

PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering

Standby mode, the SRAM and register contents are lost except for registers in the

backup domain and the backup SRAM when selected.

The device exits the Standby mode when an external reset (NRST pin), an IWDG reset,

a rising edge on the WKUP pin, or an RTC alarm / wakeup / tamper /time stamp event

occurs.

The standby mode is not supported when the embedded voltage regulator is bypassed

and the 1.2 V domain is controlled by an external power.

2.23

VBAT operation

The VBAT pin allows to power the device VBAT domain from an external battery, an external

supercapacitor, or from VDD when no external battery and an external supercapacitor are

present.

VBAT operation is activated when VDD is not present.

The VBAT pin supplies the RTC, the backup registers and the backup SRAM.

Table 5. Voltage regulator modes in stop mode

Voltage regulator

configuration

Main regulator (MR)

Low-power regulator (LPR)

Normal mode

MR ON

LPR ON

Under-drive mode

MR in under-drive mode

LPR in under-drive mode

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