LP38853_15 datasheet(14/30 Pages) TI1

14 / 30 page

LP38853

SNVS335E – DECEMBER 2006 – REVISED NOVEMBER 2015

www.ti.com

Table 1. Suggested Resistor Values

VOUT

CFF

0.8 V

1.07 k

Ω

1.78 k

Ω

12 nF

12.4 kHz

0.9 V

1.50 k

Ω

1.87 k

Ω

8.2 nF

12.9 kHz

1 V

1.00 k

Ω

1.00 k

Ω

12 nF

13.3 kHz

1.1 V

1.65 k

Ω

1.37 k

Ω

8.2 nF

11.8 kHz

1.2 V

1.40 k

Ω

1.00 k

Ω

10 nF

11.4 kHz

1.3 V

1.15 k

Ω

715

Ω

12 nF

11.5 kHz

1.4 V

1.07 k

Ω

590

Ω

12 nF

12.4 kHz

1.5 V

2.00 k

Ω

1.00 k

Ω

6.8 nF

11.7 kHz

1.6 V

1.65 k

Ω

750

Ω

8.2 nF

11.8 kHz

1.7 V

2.55 k

Ω

1.07 k

Ω

5.6 nF

11.1 kHz

1.8 V

2.94 k

Ω

1.13 k

Ω

4.7 nF

11.5 kHz

Refer to the TI Application Note AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable

Regulators (SNVA112) for additional information on how resistor tolerances affect the calculated VOUT value.

7.3.6 Enable (EN) Operation

The EN pin provides a mechanism to enable, or disable, the regulator output stage. The EN pin has an internal

pullup, through a typical 180-k

Ω resistor, to VBIAS. The EN pin can be left open or connected VBIAS if the enable

function is not needed.

7.4 Device Functional Modes

7.4.1 Input Voltage

The input voltage (VIN) is the high-current external voltage rail that is regulated down to a lower voltage, which is

applied to the load. The input voltage must be at least VOUT + VDO, and no higher than whatever value is used for

VBIAS.

For applications where VBIAS is higher than 4.5 V, VIN must be no greater than 4.5 V, otherwise output voltage

accuracy may be affected.

7.4.2 Bias Voltage

The bias voltage (VBIAS) is a low-current external voltage rail required to bias the control circuitry and provide

gate drive for the N-FET pass transistor. When VOUT is set to 1.2 V, or less, VBIAS may be anywhere in the

operating range of 3 V to 5.5 V. If VOUT is set higher than 1.2 V, VBIAS must be between 4.5 V and 5.5 V to

ensure proper operation of the device.

7.4.3 Enable Operation

If the EN pin is actively driven, pulling the EN pin above the VEN threshold of 1.25 V (typical) turns on the

regulator output; pulling the EN pin below the VEN threshold turns off the regulator output. There is approximately

100 mV of hysteresis built into the enable threshold provide noise immunity.

If the enable function is not needed the EN pin must be left open, or connected directly to VBIAS. If the EN pin is

left open, stray capacitance on this pin must be minimized; otherwise, the output turnon is delayed while the

stray capacitance is charged through the internal resistance (rEN).

Submit Documentation Feedback

Product Folder Links: LP38853

LP38853 数据表(PDF) 14 Page - Texas Instruments

LP38853 数据表(HTML) 14 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

数据表下载

链接网址

LP38853 数据表(PDF) 14 Page - Texas Instruments

LP38853 数据表(HTML) 14 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

数据表 下载

链接网址

数据表下载