COP688CS datasheet(23/53 Pages) NSC

23 / 53 page

Power Save Modes (Continued)

micro-controller in this mode of operation are typically

around 30% of normal power requirement of the microcon-

troller.

As with the HALT mode, the device can be returned to nor-

mal operation with a reset, or with a Multi-Input Wakeup from

the L Port. Alternately, the microcontroller resumes normal

operation from the IDLE mode when the thirteenth bit (repre-

senting 4.096 ms at internal clock frequency of 10 MHz, t

c =

1 µs) of the IDLE Timer toggles.

This toggle condition of the thirteenth bit of the IDLE Timer

T0 is latched into the T0PND pending flag.

The user has the option of being interrupted with a transition

on the thirteenth bit of the IDLE Timer T0. The interrupt can

be enabled or disabled via the T0EN control bit. Setting the

T0EN flag enables the interrupt and vice versa.

The user can enter the IDLE mode with the Timer T0 inter-

rupt enabled. In this case, when the T0PND bit gets set, the

device will first execute the Timer T0 interrupt service routine

and then return to the instruction following the “Enter Idle

Mode” instruction.

Alternatively, the user can enter the IDLE mode with the

IDLE Timer T0 interrupt disabled. In this case, the device will

resume normal operation with the instruction immediately

following the “Enter IDLE Mode” instruction.

Note: It is necessary to program two NOP instructions following both the set

HALT mode and set IDLE mode instructions. These NOP instructions

are necessary to allow clock resynchronization following the HALT or

IDLE modes.

Multi-Input Wakeup

The Multi-Input Wakeup feature is ued to return (wakeup) the

device from either the HALT or IDLE modes. Alternately

Multi-Input Wakeup/Interrupt feature may also be used to

generate up to 8 edge selectable external interrupts.

Figure 11 shows the Multi-Input Wakeup logic.

The Multi-Input Wakeup feature utilizes the L Port. The user

selects which particular L port bit (or combination of L Port

bits) will cause the device to exit the HALT or IDLE modes.

The selection is done through the Register WKEN. The Reg-

ister WKEN is an 8-bit read/write register, which contains a

control bit for every L port bit. Setting a particular WKEN bit

enables a Wakeup from the associated L port pin.

The user can select whether the trigger condition on the se-

lected L Port pin is going to be either a positive edge (low to

high transition) or a negative edge (high to low transition).

This selection is made via the Register WKEDG, which is an

8-bit control register with a bit assigned to each L Port pin.

Setting the control bit will select the trigger condition to be a

negative edge on that particular L Port pin. Resetting the bit

selects the trigger condition to be a positive edge. Changing

an edge select entails several steps in order to avoid a

Wakeup condition as a result of the edge change. First, the

associated WKEN bit should be reset, followed by the edge

select change in WKEDG. Next, the associated WKPND bit

should be cleared, followed by the associated WKEN bit be-

ing re-enabled.

An example may serve to clarify this procedure. Suppose we

wish to change the edge select from positive (low going high)

to negative (high going low) for L Port bit 5, where bit 5 has

previously been enabled for an input interrupt. The program

would be as follows:

RBIT

5, WKEN

; Disable MIWU

SBIT

5, WKEDG

; Change edge polarity

RBIT

5, WKPND

; Reset pending flag

SBIT

5, WKEN

; Enable MIWU

DS012829-13

FIGURE 11. Multi-Input Wake Up Logic

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