COP8SA datasheet(37/60 Pages) NSC

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11.0 MICROWIRE/PLUS (Continued)

11.1.2 MICROWIRE/PLUS Slave Mode Operation

In the MICROWIRE/PLUS Slave mode of operation the SK

clock is generated by an external source. Setting the MSEL

bit in the CNTRL register enables the SO and SK functions

onto the G Port. The SK pin must be selected as an input

and the SO pin is selected as an output pin by setting and re-

setting the appropriate bits in the Port G configuration regis-

ter.

Table 10 summarizes the settings required to enter the

Slave mode of operation.

This table assumes that the control flag MSEL is set.

TABLE 10. MICROWIRE/PLUS Mode Settings

G4 (SO)

G5 (SK)

Operation

Config. Bit

Fun.

Int.

MICROWIRE/PLUS

Master

TRI-

Int.

MICROWIRE/PLUS

STATE

Master

Ext.

MICROWIRE/PLUS

Slave

TRI-

Ext.

MICROWIRE/PLUS

STATE

Slave

The user must set the BUSY flag immediately upon entering

the Slave mode. This ensures that all data bits sent by the

Master is shifted properly. After eight clock pulses the BUSY

flag is clear, the shift clock is stopped, and the sequence

may be repeated.

10.1.3 Alternate SK Phase Operation

and SK Idle Polarity

The device allows either the normal SK clock or an alternate

phase SK clock to shift data in and out of the SIO register. In

both the modes the SK idle polarity can be either high or low.

The polarity is selected by bit 5 of Port G data register. In the

normal mode data is shifted in on the rising edge of the SK

clock and the data is shifted out on the falling edge of the SK

clock. The SIO register is shifted on each falling edge of the

SK clock. In the alternate SK phase operation, data is shifted

in on the falling edge of the SK clock and shifted out on the

rising edge of the SK clock. Bit 6 of Port G configuration reg-

ister selects the SK edge.

A control flag, SKSEL, allows either the normal SK clock or

the alternate SK clock to be selected. Resetting SKSEL

causes the MICROWIRE/PLUS logic to be clocked from the

normal SK signal. Setting the SKSEL flag selects the alter-

nate SK clock. The SKSEL is mapped into the G6 configura-

tion bit. The SKSEL flag will power up in the reset condition,

selecting the normal SK signal.

TABLE 11. MICROWIRE/PLUS Shift Clock Polarity and Sample/Shift Phase

Port G

SO Clocked Out On:

SI Sampled On:

SK Idle

Phase

SK Phase

G6 (SKSEL)

Config. Bit

Data Bit

Normal

SK Falling Edge

SK Rising Edge

Low

Alternate

SK Rising Edge

SK Falling Edge

Low

Alternate

SK Rising Edge

SK Falling Edge

High

Normal

SK Falling Edge

SK Rising Edge

High

DS012838-33

FIGURE 25. MICROWIRE/PLUS SPI Mode Interface Timing, Normal SK Mode, SK Idle Phase being Low

DS012838-34

FIGURE 26. MICROWIRE/PLUS SPI Mode Interface Timing, Alternate SK Mode, SK Idle Phase being Low

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