COP8SA datasheet(16/60 Pages) NSC

16 / 60 page

6.0 Functional Description (Continued)

The instruction set permits any bit in memory to be set, reset

or tested. All I/O and registers (except A and PC) are

memory mapped; therefore, I/O bits and register bits can be

directly and individually set, reset and tested. The accumula-

tor (A) bits can also be directly and individually tested.

RAM contents are undefined upon power-up.

TABLE 1. Program/Data Memory Sizes

Program

Data

User

Device

Memory

Storage

(Bytes)

COP8SAA7

1024

COP8SAB7

2048

128

COP8SAC7

4096

128

6.4 ECON (CONFIGURATION) REGISTER

The ECON register is used to configure the user selectable

clock, security, power-on reset, WATCHDOG, and HALT op-

tions. The register can be programmed and read only in

EPROM programming mode. Therefore, the register should

be programmed at the same time as the program memory.

The contents of the ECON register shipped from the factory

read 00 Hex (windowed device), 80 Hex (OTP device) or as

specified by the customer (ROM device).

The format of the ECON register is as follows:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

POR

SECURITY

CKI 2

CKI 1

WATCH

Reserved

HALT

DOG

Bit 7

= x

This is for factory test. The polarity is al-

ways 0.

Bit 6

= 1

Power-on reset enabled.

= 0

Power-on reset disabled.

Bit 5

= 1

Security enabled. EPROM read and write

are not allowed.

= 0

Security disabled. EPROM read and write

are allowed.

Bits 4, 3 = 0, 0 External CKI option selected. G7 is avail-

able as a HALT restart and/or general pur-

pose input. CKI is clock input.

= 0, 1 R/C oscillator option selected. G7 is avail-

able as a HALT restart and/or general pur-

pose input. CKI clock input. Internal R/C

components are supplied for maximum

R/C frequency.

= 1, 0 Crystal oscillator with on-chip crystal bias

resistor disabled. G7 (CKO) is the clock

generator output to crystal/resonator.

= 1, 1 Crystal oscillator with on-chip crystal bias

resistor enabled. G7 (CKO) is the clock

generator output to crystal/resonator.

Bit 2

= 1

WATCHDOG feature disabled. G1 is a

general purpose I/O.

= 0

WATCHDOG feature enabled. G1 pin is

WATCHDOG output with waek pullup.

Bit 1

Reserved.

Bit 0

= 1

HALT mode disabled.

= 0

HALT mode enabled.

6.5 USER STORAGE SPACE IN EPROM

In addition to the ECON register, there are 8 bytes of

EPROM available for “user information”. ECON and these 8

bytes are outside of the code area and are not protected by

the security bit of the ECON register. Even when security is

set, information in the 8-byte USER area is both read and

write enabled allowing the user to read from and write into

the area at all times while still protecting the code from unau-

thorized access.

Both ECON and USER area, 9 bytes total, are outside of the

normal address range of the EPROM and can not be ac-

cessed by the executing software. This allows for the stor-

age of non-secured information. Typical uses are for storage

of serial numbers, data codes, version numbers, copyright

information, lot numbers, etc.

The COP8 assembler defines a special ROM section type,

CONF, into which the ECON and USER data may be coded.

Both ECON and User Data are programmed automatically

by programmers that are certified by National.

The following examples illustrate the declaration of ECON

and the User information.

Syntax:

[label:] .sect econ, conf

.db

value

;1 byte,

;configures options

.db

.endsect<user information>

;up to 8 bytes

Example: The following sets a value in the ECON register

and User Identification for a COP8SAC728M7. The ECON

bit values shown select options: Power-on enabled, Security

disabled, Crystal oscillator with on-chip bias disabled,

WATCHDOG enabled and HALT mode enabled.

.chip 8SAC

.sect econ, conf

.db

0x55

;por, extal, wd, halt

.db

'my v1.00'

;user data declaration

.endsect

...

.end start

Note: All programmers certified for programming this family of parts will sup-

port programming of the CONFiguration section. Please contact Na-

tional or your device programmer supplier for more information.

6.6 OTP SECURITY

The device has a security feature that, when enabled, pre-

vents external reading of the OTP program memory. The se-

curity bit in the ECON register determines, whether security

is enabled or disabled. If the security feature is disabled, the

contents of the internal EPROM may be read.

If the security feature is enabled, then any attempt to ex-

ternally read the contents of the EPROM will result in the

value FF Hex being read from all program locations. Un-

der no circumstances can a secured part be read. In ad-

dition, with the security feature enabled, the write operation

to the EPROM program memory and ECON register is inhib-

ited. The ECON register is readable regardless of the state

of the security bit. The security bit, when set, cannot be

erased, even in windowed packages. If the security bit is

set in a device in a windowed package, that device may be

erased but will not be further programmable.

If security is being used, it is recommended that all other bits

in the ECON register be programmed first. Then the security

bit can be programmed.

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