ADS5541IPAPR datasheet(18/37 Pages) TI1

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Input Amplitude (dBFS)

−30

−20

−10

100

−100 −90 −80 −70 −60 −50 −40 −30 −20 −10

fIN = 150MHz

SNR (dBc)

SFDR (dBc)

SNR (dBFS)

Input Amplitude (dBFS)

−30

−20

−10

100

−100 −90 −80 −70 −60 −50 −40 −30 −20 −10

fIN = 220MHz

SNR (dBc)

SFDR (dBc)

SNR (dBFS)

8195 8196 8197 8198 8199 8200 8201 8201 8203

Code

39.24

Differential Clock Amplitude (V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

fIN = 70MHz

SNR

SFDR

Frequency (MHz)

−140

−120

−100

−80

−60

−40

−20

Clock Duty Cycle (%)

fIN = 20MHz

SNR

SFDR

Production Data

ADS5541

SBAS307C – MAY 2004 – REVISED FEBRUARY 2007

TYPICAL CHARACTERISTICS (continued)

At T

A = +25°C, AVDD = DRVDD = 3.3V, sampling rate = 105MSPS, 50% clock duty cycle, DLL On, 3VPP differential clock, and

–1dBFS differential input, unless otherwise noted.

AC PERFORMANCE vs INPUT AMPLITUDE

Figure 29.

Figure 30.

AC PERFORMANCE vs DIFFERENTIAL CLOCK

OUTPUT NOISE HISTOGRAM

AMPLITUDE

Figure 31.

Figure 32.

WCDMA CARRIER

AC PERFORMANCE vs CLOCK DUTY CYCLE

Figure 33.

Figure 34.

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