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DP8570AV 数据表(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 DP8570AV
功能描述  Timer Clock Peripheral (TCP)
PDF  26 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

DP8570AV 数据表(HTML) 2 Page - National Semiconductor (TI)

  DP8570AV Datasheet HTML 1Page - National Semiconductor (TI) DP8570AV Datasheet HTML 2Page - National Semiconductor (TI) DP8570AV Datasheet HTML 3Page - National Semiconductor (TI) DP8570AV Datasheet HTML 4Page - National Semiconductor (TI) DP8570AV Datasheet HTML 5Page - National Semiconductor (TI) DP8570AV Datasheet HTML 6Page - National Semiconductor (TI) DP8570AV Datasheet HTML 7Page - National Semiconductor (TI) DP8570AV Datasheet HTML 8Page - National Semiconductor (TI) DP8570AV Datasheet HTML 9Page - National Semiconductor (TI) Next Button
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Absolute Maximum Ratings (Notes12)
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
Supply Voltage (VCC)
b
05V to a70V
DC Input Voltage (VIN)
b
05V to VCC a05V
DC Output Voltage (VOUT)
b
05V to VCC a 05V
Storage Temperature Range
b
65 Cto a150 C
Power Dissipation (PD)
500 mW
Lead Temperature (Soldering 10 sec)
260 C
Operation Conditions
Min
Max
Unit
Supply Voltage (VCC) (Note 3)
45
55
V
Supply Voltage (VBB) (Note 3)
22
VCCb04
V
DC Input or Output Voltage
00
VCC
V
(VIN VOUT)
Operation Temperature (TA)
b
40
a
85
C
Electr-Static Discharge Rating TBD
1
kV
Transistor Count
15200
Typical Values
iJA DIP
Board e 45 CW
Socket e 50 CW
iJA PLCC
Board e 77 CW
Socket e 85 CW
DC Electrical Characteristics
VCC e 5V g10% VBB e 3V VPFAIL l VIH CL e 100 pF (unless otherwise specified)
Symbol
Parameter
Conditions
Min
Max
Units
VIH
High Level Input Voltage
Any Inputs Except OSC IN
20
V
(Note 4)
OSC IN with External Clock
VBB b01
V
VIL
Low Level Input Voltage
All Inputs Except OSC IN
08
V
OSC IN with External Clock
01
V
VOH
High Level Output Voltage
IOUT eb20 mAVCC b01
V
(Excluding OSC OUT)
IOUT eb40 mA
35
V
VOL
Low Level Output Voltage
IOUT e 20 mA
01
V
(Excluding OSC OUT)
IOUT e 40 mA
025
V
IIN
Input Current (Except OSC IN)
VIN e VCC or GND
g
10
m
A
IOZ
Output TRI-STATE Current
VOUT e VCC or GND
g
50
m
A
ILKG
Output High Leakage Current
VOUT e VCC or GND
g
50
m
A
T1 MFO INTR Pins
Outputs Open Drain
ICC
Quiescent Supply Current
FOSC e 32768 kHz
(Note 7)
VIN e VCC or GND (Note 5)
260
m
A
VIN e VCC or GND (Note 6)
10
mA
VIN e VIH or VIL (Note 6)
120
mA
FOSC e 4194304 MHz or
49152 MHz
VIN e VCC or GND (Note 6)
8
mA
VIN e VIH or VIL (Note 6)
20
mA
ICC
Quiescent Supply Current
VBB e GND
(Single Supply Mode)
VIN e VCC or GND
(Note 7)
FOSC e 32768 kHz
80
m
A
FOSC e 49152 MHz or
75
mA
4194304 MHz
IBB
Standby Mode Battery
VCC e GND
Supply Current
OSC OUT e Open Circuit
(Note 8)
Other Pins e GND
FOSC e 32768 kHz
10
m
A
FOSC e 49152 MHz or
400
m
A
4194304 MHz
IBLK
Battery Supply Leakage
22V s VBB s 40V
Other Pins at GND
VCC e GND VBB e 40V
15
m
A
VCC e 55V VBB e 22V
b
5
m
A
Note 1
Absolute Maximum Ratings are those values beyond which damage to the device may occur
Note 2
Unless otherwise specified all voltages are referenced to ground
Note 3
For FOSC e 4194304 or 49152 MHz VBB minimum e 28V In battery backed mode VBB s VCC b04V
Single Supply Mode Data retention voltage is 22V min
In single Supply Mode (Power connected to VCC pin) 45V s VCC s 55V
Note 4
This parameter (VIH) is not tested on all pins at the same time
Note 5
This specification tests ICC with all power fail circuitry disabled by setting D7 of Interrupt Control Register 1 to 0
Note 6
This specification tests ICC with all power fail circuitry enabled by setting D7 of Interrupt Control Register 1 to 1
Note 7
This specification is tested with both the timers and OSC IN driven by a signal generator Contents of the Test Register e 00(H) the MFO pin is not
configured as buffered oscillator out and MFO T1 INTR are configured as open drain
Note 8
This specification is tested with both the timers off and only OSC IN is driven by a signal generator Contents of the Test Register e 00(H) and the MFO
pin is not configured as buffered oscillator out
2



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