P89LPC921 datasheet(8/45 Pages) PHILIPS

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Philips Semiconductors

P89LPC920/921/922

8-bit microcontrollers with two-clock 80C51 core

Product data

Rev. 06 — 21 November 2003

8 of 45

9397 750 12285

[1]

Input/Output for P1.0-P1.4, P1.6, P1.7. Input for P1.5.

Logic symbol

P3.0 - P3.1

7, 6

I/O

Port 3: Port 3 is an 2-bit I/O port with a user-conﬁgurable output type. During reset

Port 3 latches are conﬁgured in the input only mode with the internal pull-up disabled.

The operation of Port 3 pins as inputs and outputs depends upon the port conﬁguration

selected. Each port pin is conﬁgured independently. Refer to Section 8.12.1 “Port

conﬁgurations” and Table 8 “DC electrical characteristics” for details.

All pins have Schmitt triggered inputs.

Port 3 also provides various special functions as described below:

I/O

P3.0 — Port 3 bit 0.

XTAL2 — Output from the oscillator ampliﬁer (when a crystal oscillator option is

selected via the FLASH conﬁguration.

CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK - TRIM.6). It

can be used if the CPU clock is the internal RC oscillator, watchdog oscillator or

external clock input, except when XTAL1/XTAL2 are used to generate clock source for

the real time clock/system timer.

I/O

P3.1 — Port 3 bit 1.

XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when

selected via the FLASH conﬁguration). It can be a port pin if internal RC oscillator or

watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not used

to generate the clock for the real time clock/system timer.

VSS

Ground: 0 V reference.

VDD

Power Supply: This is the power supply voltage for normal operation as well as Idle

and Power Down modes.

Table 3:

Pin description…continued

Symbol

Type

Description

Fig 4.

Logic symbol.

VDD

VSS

TxD

RxD

INT0

INT1

RST

SCL

SDA

002aaa409

CMP2

CIN2B

CIN2A

CIN1B

CIN1A

CMPREF

CMP1

XTAL2

XTAL1

KBI0

KBI1

KBI2

KBI3

KBI4

KBI5

KBI6

KBI7

CLKOUT

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