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P89LPC921 数据表(PDF) 37 Page - NXP Semiconductors |
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P89LPC921 数据表(HTML) 37 Page - NXP Semiconductors |
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37 / 45 page ![]() Philips Semiconductors P89LPC920/921/922 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 06 — 21 November 2003 37 of 45 9397 750 12285 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. Fig 12. Shift register mode timing. 0 1 23 45 6 7 Valid Valid Valid Valid Valid Valid Valid Valid tXLXL 002aaa425 Set TI Set RI tXHQX tQVXH tXHDV tXHDX Clock Output Data Write to SBUF Input Data Clear RI Fig 13. External clock timing. tCHCL tCLCX tCHCX tC tCLCH 002aaa416 0.2 VDD + 0.9 0.2 VDD - 0.1 V VDD - 0.5 V 0.45 V Table 10: AC characteristics, ISP entry mode VDD = 2.4 V to 3.6 V, unless otherwise specified. Tamb = −40 °C to +85 °C for industrial, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit tVR RST delay from VDD active 50 - - µs tRH RST HIGH time 1 - 32 µs tRL RST LOW time 1 - - µs Fig 14. ISP entry waveform. 002aaa426 VDD RST tRL tVR tRH |
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