PCM1802

SLES023B – DECEMBER 2001 – REVISED MARCH 2002

21

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PRINCIPLES OF OPERATION

power down, LCF bypass, oversampling control (continued)

OSR (pin 16) controls the oversampling ratio of the delta-sigma modulator,

×64 or ×128. The ×128 mode is

system clock.

Table 6. Oversampling Control

OSR

Oversampling ratio

LOW

×64

HIGH

×128 (fS < 50 kHz)

APPLICATION INFORMATION

typical circuit connection diagram

Figure 29 illustrates a typical circuit connection diagram in which the cutoff frequency of the input HPF is about

8 Hz.

VINL

20

19

18

17

16

15

14

13

12

11

1

2

3

4

5

6

7

8

9

10

PCM1802

VINR

VREF1

VREF2

VCC

AGND

PDWN

BYPAS

FSYNC

LRCK

MODE1

DGND

MODE0

FMT1

FMT0

OSR

DOUT

BCK

VDD

SCKI

+

Oversampling

System Clock

L-Ch IN

R-Ch IN

0 V

5 V

C4‡

+

C5§

Power Down

LCF Bypass

Control

+

C3‡

L/R Clock

Frame Sync.

Audio Data

Processor

Mode [1:0]

Format [1:0]

3.3 V

0 V

Data Clock

Data Out

+

C1†

+

C2†

Control

+

C6W

R1#

† C1, C2: A 1-µF capacitor gives 8-Hz ( τ = 1 µF × 20 kΩ) cutoff frequency for input HPF in normal operation, and requires a power-on settling

time with 20-ms time constant in the power-on initialization period.

‡ C3, C4: Bypass capacitors, 0.1-µF ceramic and 10-µF tantalum, depending on layout and power supply.

§ C5: 0.1-µF ceramic and 4.7-µF tantalum capacitors are recommended.

¶ C6: 0.1-µF ceramic and 4.7-µF tantalum capacitors are recommended for using a noise analog power supply. These capacitor are not required

for clean analog supply.

# R1: 1-kΩ resistor is recommended for using a noisy analog power supply. This resistor is shorted for a clean analog supply.

Figure 29. Typical Circuit Connection