TP3402 datasheet(6/16 Pages) NSC

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TABLE II Control and Status Register Functions

Bit

State

Control Register Function

Status Register Function

Master Mode

Read Back C7 from Control Register

Slave Mode

Read Back C7 from Control Register

Deactivate and Power Down

Read Back C6 from Control Register

Power Up and Activate

Read Back C6 from Control Register

Normal Through Connection

Read Back C5 from Control Register

Loopback to Digital Interface

Read Back C5 from Control Register

Normal Through Connection

Read Back C4 from Control Register

Loopback B1aB2aD to Line (Note 1)

Read Back C4 from Control Register

Normal Through Connection

Read Back C3 from Control Register

Loopback B1 Only to Line (Note 1)

Read Back C3 from Control Register

Normal Through Connection

No Error

Loopback B2 Only to Line (Note 1)

Bipolar Violation Since Last READ (Note 2)

DCLKDEN pin e 16 kHz Clock

Out-Of-Sync

DCLKDEN pin e D Channel Enable (Note 3)

Loop In-Sync and Activation Complete

B1B2 Channels Direct

No Line Signal at Receiver Input

B1B2 Channels Exchanged

Line Signal Present at Receiver Input

Note 1

Receive data active

Note 2

After the device is in sync

Note 3

In Master mode only

Note 4

C7 is the first bit clocked in and out of the device

Timing Diagrams

TLH9264 – 6

FIGURE 6 B Channel Interface Timing Master Mode

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