| 数据搜索系统,热门电子元器件搜索 |
|
CS5505-ASZ 数据表(PDF) 34 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS5505-ASZ 数据表(HTML) 34 Page - Cirrus Logic |
|
34 / 40 page ![]() Introduction The CDB5505/6/7/8 evaluation board provides a quick means of testing the CS5505/6/7/8 series A/D converters. The CS5505/6/7/8 converters require a minimal amount of external circuitry. The evaluation board comes configured with the A/D converter chip operating from a 32.768 kHz crystal and with an off-chip precision 2.5 volt reference. The board provides access to all of the digital interface pins of the CS5505/6/7/8 chip. The board is configured for operation from +5 and -5 volt power supplies, but can be operated from a single +5 volt supply if the -5V binding post is shorted to the GND binding post. Evaluation Board Overview The board provides a complete means of making the CS5505/6/7/8 A/D converter chip function. The user must provide a means of taking the output data from the board in serial format and using it in his system. Figure 1 illustrates the schematic for the board. The board comes configured for the A/D con- verter chip to operate from the 32.768 kHz watch crystal. A BNC connector for an external clock is provided on the board. To connect the external BNC source to the converter chip, a cir- cuit trace must be cut. Then a jumper must be inserted in the proper holes to connect the XIN pin of the converter to the input line from the BNC. The BNC input is terminated with a 50 Ω resistor. Remove this resistor if driving from a logic gate. See the schematic in Figure 1. The board comes with the A/D converter VREF+ and VREF- pins hard-wired to the 2.5 volt bandgap voltage reference IC on the board. The VREF+ and VREF- pins can be con- nected to either the on chip reference or an off-board reference if the connections (2A and 2B) to the bandgap IC are cut. Note that the pin-out of the CS5505/6/7/8 series chips allows the 20-pin single channel devices to be plugged into the 24-pin, four channel foot- print. See Figure 2 which illustrates the footprint compatibility. Prior to powering up the board, select the serial port operating mode with the appropriate jumper on the M/SLP header. The device can be oper- a t e d in e ither the SSC (Synchronous Self-Clocking) or the SEC (Synchronous Exter- nal Clocking) mode. See the device data sheet for an explanation of these modes. All of the control pins of the CS5505/6/7/8 are available at the J1 header connector. Buffer ICs U2 and U3 are used to buffer the converter for interface to off-board circuits. The buffers are used on the evaluation board only because the exact loading and off-board circuitry is un- known. Most applications will not require the buffer ICs for proper operation. To put the board in operation, select either bipo- lar or unipolar mode with DIP switch S2. Then press the CAL pushbutton after the board is powered up. This initiates calibration of the con- verter which is required before measurements can be taken. To select an input channel on the four channel devices, use DIP switch S2 to select the inputs A1 A0 Channel addressed 00 AIN1 01 AIN2 10 AIN3 11 AIN4 Table 1. Multiplexer Truth Table CS5505/6/7/8 34 DS59DB2 CDB5505/6/7/8 34 DS59DB3 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |