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QL8050 数据表(PDF) 6 Page - List of Unclassifed Manufacturers

部件名 QL8050
功能描述  LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM
PDF  49 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
网页  
标志 ETC - List of Unclassifed Manufacturers

QL8050 数据表(HTML) 6 Page - List of Unclassifed Manufacturers

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(FOLSVH,, )DPLO\ 'DWD 6KHHW5HY %
Preliminary

)LJXUH  (&8 %ORFN 'LDJUDP
The Eclipse-II ECU blocks (
7DEOH ) are placed next to the SRAM circuitry for efficient
memory/instruction fetch and addressing for DSP algorithmic implementations.
Up to twelve 8-bit MAC functions can be implemented per cycle for a total of 1 billion MACs/s
when clocked at 100 MHz. Additional multiply-accumulate functions can be implemented in the
programmable logic.
7DEOH (FOLSVH,, (&8 %ORFNV
'HYLFH
(&8V
QL8325
12
QL8250
10
QL8150
0
QL8050
0
QL8025
0
A[0:15]
B[0:15]
SIGN2
SIGN1
CIN
S1
S2
S3
A
B
C
D
3-4
decoder
8-bit
Multiplier
16-bit
Adder
17-bit
Register
2-1
mux
2-1
mux
3-1
mux
Q[16:0]
CLK
RESET
DQ
00
01
10
A[7:0]
A[15:8]



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