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QL8050 数据表(PDF) 1 Page - List of Unclassifed Manufacturers

部件名 QL8050
功能描述  LOW POWER FPGA COMBINING PERFORMANCE DENSITY AND EMBEDED RAM
PDF  49 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
网页  
标志 ETC - List of Unclassifed Manufacturers

QL8050 数据表(HTML) 1 Page - List of Unclassifed Manufacturers

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‡ 0.18 µ, six layer metal CMOS process
‡ 1.8 V Vcc, 1.8/2.5/3.3 V drive capable I/O
‡ Up to 4,008 dedicated flip-flops
‡ Up to 55.3 K embedded RAM Bits
‡ Up to 313 I/O
‡ Up to 370 K system gates
‡ IEEE 1149.1 Boundary Scan Testing
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‡ Low Power Capability
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‡ Up to twenty-four 2,304 bit Dual Port High
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‡ Up to 55,296 embedded RAM bits
‡ RAM/ROM/FIFO Wizard for automatic
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‡ Configurable and cascadable
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‡ High performance I/O cell with Tco< 3 ns
‡ Programmable Slew Rate Control
‡ Programmable I/O Standards:
‡ LVTTL, LVCMOS, LVCMOS18, PCI,
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‡ Independent I/O Banks capable of
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‡ I/O Register Configurations: Input,
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‡ Multiple dedicated Low Skew Clock
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