DP7261

© NIDEC COPAL ELECTRONICS CORP.

1

Doc. No. MD-2122 Rev. D

Characteristics subject to change without notice

Dual Digital Potentiometers

(DP) with 256 Taps and SPI Interface

FEATURES

Two linear-taper digital potentiometers

256 resistor taps per potentiometer

End to end resistance 50k

or 100k

Potentiometer control and memory access via

SPI interface

Low wiper resistance, typically 100

Nonvolatile memory storage for up to four

wiper settings for each potentiometer

Automatic recall of saved wiper settings at

power up

2.5 to 6.0 volt operation

Standby current less than 1µA

1,000,000 nonvolatile WRITE cycles

100 year nonvolatile memory data retention

24-lead SOIC and 24-lead TSSOP

Industrial temperature range

Industrial temperature range

For Ordering Information details, see page 14.

PIN CONFIGURATION

SOIC/TSSOP (W, Y)

SO

1

24 HOLD

¯¯¯¯¯

A0

2

23 SCK

NC

3

22 NC

NC

4

21 NC

NC

5

20 NC

NC

6

19 NC

7

DP

7261

18 GND

CS

¯¯¯ 11

14 A1

WP

¯¯¯ 12

13 SI

DESCRIPTION

The

DP7261

is

two

Digital

Potentiometers

(DPs) integrated with control logic and 8 bytes of

NVRAM memory. Each DP consists of a series

of

resistive

elements

connected

between

two

externally accessible end points. The tap points

between each resistive element are connected to the

wiper outputs with CMOS switches. A separate 8-bit

control register (WCR) independently controls the wiper

tap switches for each DP. Associated with each wiper

control register are four 8-bit non-volatile memory data

registers (DR) used for storing up to four wiper settings.

Writing to the wiper control register or any of the non-

volatile data registers is via a SPI serial bus. On power-

up, the contents of the first data register (DR0) for each

of the potentiometers is automatically loaded into its

respective wiper control register.

The DP7261 can be used as a potentiometer or as a

two terminal, variable resistor. It is intended for circuit

level or system level adjustments in a wide variety of

applications. It is available in the -40°C to 85°C

industrial operating temperature range and offered in

a 24-lead SOIC and TSSOP package.

FUNCTIONAL DIAGRAM

A0

A1

WP

HOLD

NONVOLATILE

DATA

REGISTERS

WIPER

CONTROL

REGISTERS

CONTROL

LOGIC

SPI BUS

INTERFACE

SCK

SI

CS

SO