DP7261

Doc. No. MD-2122 Rev. E

6

© NIDEC COPAL ELECTRONICS CORP.

Characteristics subject to change without notice

POWER UP TIMING

(1)(2)

s

t

i

n

U

x

a

M

r

e

t

e

m

a

r

a

P

l

o

b

m

y

S

s

m

1

n

o

i

t

a

r

e

p

O

d

a

e

R

o

t

p

u

-

r

e

w

o

P

s

m

1

n

o

i

t

a

r

e

p

O

e

t

i

r

W

o

t

p

u

-

r

e

w

o

P

DP TIMING

s

t

i

n

U

x

a

M

n

i

M

r

e

t

e

m

a

r

a

P

l

o

b

m

y

S

s

µ

0

1

5

e

l

b

a

t

S

y

l

p

p

u

S

r

e

w

o

P

r

e

t

f

A

e

m

i

T

e

s

n

o

p

s

e

R

r

e

p

i

W

s

µ

0

1

5

d

e

u

s

s

I

n

o

i

t

c

u

r

t

s

n

I

r

e

t

f

A

e

m

i

T

e

s

n

o

p

s

e

R

r

e

p

i

W

WRITE CYCLE LIMITS

s

t

i

n

U

x

a

M

r

e

t

e

m

a

r

a

P

l

o

b

m

y

S

s

m

5

e

m

i

T

e

l

c

y

C

e

t

i

r

W

RELIABILITY CHARACTERISTICS

s

t

i

n

U

x

a

M

n

i

M

d

o

h

t

e

M

t

s

e

T

e

c

n

e

r

e

f

e

R

r

e

t

e

m

a

r

a

P

l

o

b

m

y

S

(3)

Endurance

MIL-STD-883, Test Method 1033

1,000,000

Cycles/Byte

(3)

Data Retention

MIL-STD-883, Test Method 1008

100

Years

(3)

ESD Susceptibility

MIL-STD-883, Test Method 3015

2000

V

(3)

A

m

0

0

1

7

1

d

r

a

d

n

a

t

S

C

E

D

E

J

p

U

-

h

c

t

a

L

Notes:

(1)

This parameter is tested initially and after a design or process change that affects the parameter.

(2)

(3)

This parameter is tested initially and after a design or process change that affects the parameter.

Figure 1. Synchronous Data Timing

Note: Dashed Line = mode (1, 1)

VALID IN

VIL

HI-Z

HI-Z

CS

SCK

SI

SO

tFI