REV. 0

ADP3204

–9–

PIN FUNCTION DESCRIPTIONS (continued)

Pin

Mnemonic

Function

32

DPRSHIFT

Deeper Sleep Shift. This is an analog I/O pin whose output is a fixed voltage reference and whose

input current is programmed by an external resistor to ground. The current is used to set two

switched bias currents that flow into both the REG and COREFB pins, depending on the DPRSLP

signal. When activated, the REG pin bias current creates an upward shift of the regulated core

voltage from the internally set (default) Deeper Sleep value to the voltage level specified by the CPU

Deeper Sleep operation. The COREFB bias current creates the same amount of downward shift of

the COREFB voltage is. The shifted back COREFB voltage compared against the internally set

Deeper Sleep voltage to create Power Good information. Use of the Deeper Sleep Shift adjustment

and the DACRAMP rate control features are exclusive.

6

2

3

4

5

1

VCC

BST

DRVH

SW

SD

IN

DRVLSD

DLY

GND

DRVL

ADP3415

10

9

8

4

5

6

7

8

1

2

17

18

19

20

21

22

23

24

Q7

V_5S

2x0.1 F

4x10 F

V_DC

C32

1 F

D3

BAR43S

VR_ VID4

VR_ VID3

VR_ VID1

VR_ VID0

GMUXSEL

STP_CPU

DPRSLPVR

VR_PWRGD

L3

0.32 H

Q5

IR7811W

Q6

IR7811W

Q14

IR7822

Q13

IR7822

CORE_ON

7

R16

6

2

3

4

5

1

VCC

BST

DRVH

SW

SD

IN

DRVLSD

DLY

GND

DRVL

ADP3415

10

9

8

7

C33

0.1 F

V_5S

D1

BAR43S

C13

0.1 F

C37 . . . C40

R106

C43

3.3 F

R104

C41

3.3 F

R18

0

D6

MBRS130LT3

0

RDSHIFT

RBSHIFT

RHYSSET 21.5k

1%

8.87k

1%

21.5k

1%

OPTIONAL: DEEPERSLEEP

VOLTAGE ADJUSTMENT

VID4

GND

DPRSLP

VCC

CS1

CS2

CS3

OUT1

OUT2

OUT3

VID3

VID0

3

VID2

VID1

VR_ VID2

BOM

ADP3204

DPSLP

SET: LATCHED OCP

OPEN: HICCUP OCP

D90

BAR43S

R90

300k

0.047 F

CSS

JP1

R9

1.05k

1%

C9

10pF

RD

1.05k

1%

C6

1000pF

RCL 576 1%

RC

1.5k

1%

RB 54.9k

RA243 1%

C3

C4

10pF

10pF

V_3S

C2

0.1

µF

C1

1

µF

R4 2.7

6

2

3

4

5

1

VCC

BST

DRVH

SW

SD

IN

DRVLSD

DLY

GND

DRVL

ADP3415

10

9

8

V_5S

D2

BAR43S

7

C23

0.1 F

R102

C42

3.3 F

R17

0

RCS3

R15

C31

2x0.1 F

4x10 F

V_DC

C32

1 F

L2

0.32 H

Q4

IR7811W

Q12

IR7822

Q11

IR7822

C27 . . . C30

D5

MBRS130LT3

R14

C21

2x0.1 F

4x10 F

V_DC

C12

1 F

L1

0.32 H

Q2

IR7811W

Q10

IR7822

Q9

IR7822

C17 . . . C20

D4

MBRS130LT3

R23

C11

C44...C49

6x220 F

VCC CORE

IR7807V

R20

5.1k

V5

Q1

IR7811W

Q3

IR7811W

2.7

RCS2

RCS1

2.7

RDPRSHIFT

VCC-VID (1.2V)

2.7

4700pF

3m

0.018 F

10

10

10

3m

3m

0.018 F

0.018 F

V_3S

220k

(IMVP-II ONLY)

3k

Figure 1. Typical Application