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ADP3204

SoftStart and Hiccup

A capacitor from the SS pin to ground determines both the soft

start time and the frequency at which hiccup will occur under a

continuous short circuit or overload.

System Signal Interface

Several pins of the ADP3204 are meant to connect directly to

system signals. The VID pins connect to the system VID

control signals. The DPRSLP pin connects to the system’s

DPRSLPVR signal. The

DPSLP pin connects to the system’s

DPSLP or STPCPU signal. The BOM signal connects to the

system’s GMUXSEL signal. In an IMVP-II system, the

GMUXSEL signal precedes any VID code change with a few

nanoseconds, while in an IMVP-III system, it follows it with a

maximum 12

µs delay. To comply with both specifications, the

ADP3204 has a VID register in front of the DAC inputs that is

written by a short pulse generated at the rising or falling edge of

the GMUXSEL signal. In an IMVP-II configuration, if the

external VID multiplex settling time is longer than the internal

VID register’s write pulsewidth, then the insertion of an external

RC delay network in the GMUXSEL signal path (in front of the

BOM pin) is recommended. The Intel specification calls for

maximum 200 ns VID code setup time. This specification can

be met with a simple RC network that consists of only a 220 k

Ω

resistor and no external capacitor, just the

BOM pin’s capacitance.

Undervoltage Lockout

The ADP3204’s supply pin, VCC, has undervoltage lockout

(UVLO) functionality to ensure that if the supply voltage is too

low to maintain proper operation, the IC will remain off and in

a low current state.

Overvoltage Protection (OVP) and Reverse Voltage

Protection (RVP)

The ADP3204 features a comprehensive redundantly monitored

OVP and RVP implementation to protect the CPU core against

an excessive or reverse voltage, e.g., as might be induced by a

component or connection failure in the control or power stage.

Two pins are associated with the OVP/RVP circuitry—a pin for

output voltage feedback, COREFB, which is also used for

power good monitoring but not for voltage regulation, and an

output pin, CLAMP.

The CLAMP pin defaults to a low state at startup of the

ADP3204 and remains low until an overvoltage or reverse

voltage condition is detected. If either condition is detected, the

CLAMP signal is asserted and latched high.

For maximum and fastest protection, the CLAMP pin should

be used to drive the gate of a power MOSFET whose drain

source is connected across the CPU core voltage. Detection of

overvoltage or reverse voltage will clamp the core voltage to

essentially zero, thus quickly removing the fault condition and

preventing further energy from being applied to the CPU core.

For a less comprehensively protective and less costly solution,

the CLAMP pin may be used to latch the disconnection of

input power. The latch should be powered whenever any input

power source is present. Typically, such a latching circuit is

already present in a system design, so it becomes only a matter

of allowing the CLAMP pin to also trigger the latch. In this

configuration, the latched off state of the system would be

indicative of a system failure. The overvoltage/reverse voltage

protective means is via not allowing the continued application of

energy to the CPU core. The design objective should be, however,

to ensure that the CPU core could safely absorb the remaining

energy in the power converter, since this energy is not clamped

as in the preferred configuration.

LAYOUT CONSIDERATIONS

Advantages in PCB Layout

Analog Devices provides ADP3204/3415 as a dedicated three-

phase power management solution for IMVP-III Intel P4

mobile core supply.

This three-phase solution separates the controller (ADP3204)

and the MOSFET drivers (ADP3415). Today, most motherboards

only leave small pieces of PCB area for the power management

circuit. Therefore, the separation of the controller and the

MOSFET drivers gives much greater freedom in layout than

any single chip solution.

Meanwhile, the separation also provides the freedom to place

the analog controller in a relatively quiet area in the motherboard.

This can minimize the susceptibility of the controller to injected

noise. Any single chip solution with a high speed loop design

will suffer larger susceptibility to jitter that appears as modulation

of the output voltage.

The ADP3204 maximizes the integration of IMVP-III features.

Therefore, no additional externally implemented functions are

required to comply with IMVP-III specifications. This saves

PCB area for component placement on the motherboard.

PCB Layout Consideration for ADP3204/3415

The following guidelines are recommended for optimal perfor-

mance of the ADP3204 and ADP3415 in a power converter.

The circuitry is considered in three parts: the power switching

circuitry, the output filter, and the control circuitry.

Placement Overview

1. For ideal component placement, the output filter capacitors

will divide the power switching circuitry from the control

section. As an approximate guideline considered on a single-

sided PCB, the best layout would have components aligned

in the following order: ADP3415, MOSFETs and input

capacitor, output inductor, current sense resistor, output

capacitors, control components, and ADP3204. Note that

the ADP3204 and ADP3415 are completely separated for an

ideal layout, which is impossible with a single-chip solution.

This keeps the noisy switched power section isolated from

the precision control section and gives more freedom in the

layout of the power switching circuitry.

2. Whenever a power dissipating component (e.g., a power

MOSFET) is soldered to a PCB, the liberal use of vias, both

directly on the mounting pad if possible and immediately

surrounding it, is recommended. Two important reasons for

this are: improvement of the current rating through the vias

(if it is a current path) and improved thermal performance,

especially if there is opportunity to spread the heat with a

plane on the opposite side of the PCB.