REV. 0

–14–

ADP3204

LOAD

L

Q1

Q2

+

t

t

t

Figure 2. Conventional Hysteretic Regulator and

Its Characteristic Waveforms

Since there is no voltage error amplifier in the hysteretic

regulator, its response to any change in the load current or the

input voltage is virtually instantaneous. Therefore, the hysteretic

regulator represents the fastest possible dc-to-dc converter. A

slight disadvantage of the conventional hysteretic regulator is

that its frequency varies with the input and output voltages. In a

typical mobile CPU converter application, the worst-case

frequency variation due to the input voltage variation is in the

order of 30%, which is usually acceptable. In the simplest

implementation of the hysteretic converter, shown in Figure 2,

the frequency also varies proportionally with the ESR, R

output capacitor. Since the initial value is often poorly con-

trolled, and the ESR of electrolytic capacitors also changes with

temperature and age, practical ESR variations can easily lead to

a frequency variation in the order of three to one. However, a

modification of the hysteretic topology eliminates the depen-

dence of the operating frequency on the ESR. In addition, the

modification allows the optimal implementation, ADOPT, of

Intel’s IMVP-II and IMVP-III load-line specifications. Figure 3

shows the modified hysteretic regulator.

Q1

Q2

+

Figure 3. Modified Hysteretic Regulator with ADOPT

The implementation requires adding a resistive divider (R

C

and R

connecting the tap of the divider to the noninverting input

of the hysteretic comparator. A capacitor, C

across the upper member (R

It is easily shown that the output impedance of the con-

verter can be no less than the ESR of the output capacitor.

A straightforward derivation demonstrates that the output

impedance of the converter in Figure 3 can be minimized to

equal the ESR, R

valid (neglecting PCB trace resistance for now):

R

R

R

R

E

CS

D

C

=+

1

(1)

and

C

CR

RR

OC

OE

CS

D

=

2

(2)

From (Equation 2), the series resistance is:

R

R

R

R

CS

E

D

C

=

+

1

(3)

This is the ADOPT configuration and design procedure that

allows the maximum possible ESR to be used while meeting a

given load-line specification.

It can be seen from Equation 3 that unless R

infinite, R

the circuit in Figure 3 is that if we select the ratio R

above unity, the additional dissipation introduced by the series

resistance R

the circuit in Figure 3 is that the ac voltage across the two

inputs of the hysteretic comparator is now equal only to the ac

voltage across R

C

voltage to the noninverting input voltage of the comparator.

Since the comparator sees only the ac voltage across R

circuit in Figure 3 the dependence of the switching frequency

on the ESR of the output capacitor is completely eliminated.

Equation 4 presents the expression for the switching frequency.

f

R

LV

(V

V

)

V

CS

H

IN

OUT

IN

=

−

V

OUT

(4)

Multiphase Hysteretic Regulator with ADOPT

Multiphase converters have very important advantages, includ-

ing reduced rms current in the input filter capacitor (allowing

the use of a smaller and less expensive device), distributed heat

dissipation (reducing the hot spot temperature and increasing

reliability), higher total power capability, increased equivalent

frequency without increased switching losses (allowing the use

of smaller equivalent inductances, and thereby shortening the

load transient time), and reduced ripple current in the output

capacitor (reducing the output ripple voltage and allowing the

use of a smaller and less expensive output capacitor). Also, they

have some disadvantages, which should be considered when

choosing the number of phases. Those disadvantages include the

need for more switches and output inductors than in a single-phase

design (leading to higher cost than a single-phase solution, at

least below a certain power level), more complex control, and

the possibility of uneven current sharing among the phases.

The family of ADP320x controllers alleviates two of the above

disadvantages of multiphase converters. It presents a simple and

cost-effective control solution, and provides perfect current

sharing among the phases. Figure 4 shows a simplified block

diagram of a three-phase converter using the control principle

implemented with the ADP3204, the three-phase member of

the ADP320x family.

As Figure 4 shows, in the multiphase configuration, the ripple

current signal is multiplexed from all channels. During the on

time of any given channel, its current is compared to the upper

threshold of the hysteretic comparator. When the current

reaches the upper threshold, the control FET of that channel is