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MT9072AB 数据表(PDF) 107 Page - Zarlink Semiconductor Inc |
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MT9072AB 数据表(HTML) 107 Page - Zarlink Semiconductor Inc |
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107 / 275 page ![]() MT9072 Data Sheet 107 Zarlink Semiconductor Inc. 17.0 MT9072 Register Set 17.1 T1 Register Set 17.1.1 Register Address (000 - FFF) Summaries 17.1.1.1 Framer Address (0XX-9XX) Summary Binary Address (A11-A0) Hex Address Framer Accessed 000 xxxx xxxx 0XX 0 001 xxxx xxxx 1XX 1 010 xxxx xxxx 2XX 2 011 xxxx xxxx 3XX 3 100 xxxx xxxx 4XX 4 101 xxxx xxxx 5XX 5 110 xxxx xxxx 6XX 6 111 xxxx xxxx 7XX 7 1000 xxxx xxxx 8XX 0,1,2...7 (reserved for writes only) 1001 0000 xxxx 90X Global control Registers for the MT9072 1001 0001 xxxx 91X Global status Registers for the MT9072 1001 0010 xxxx 92X ST-BUS analyser buffer data 1001 0011 xxxx 93X ST-BUS analyser buffer data xxxx indicates all (0000 to 1111) binary possibilities X indicates all (0 to F) hex possibilities Table 55 - Framer Addressing (0XX - 9XX) (T1) |
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