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MT9072AB 数据表(PDF) 121 Page - Zarlink Semiconductor Inc

部件名 MT9072AB
功能描述  Octal T1/E1/J1 Framer
PDF  275 Pages
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制造商  ZARLINK [Zarlink Semiconductor Inc]
网页  http://www.zarlink.com
标志 ZARLINK - Zarlink Semiconductor Inc

MT9072AB 数据表(HTML) 121 Page - Zarlink Semiconductor Inc

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MT9072
Data Sheet
121
Zarlink Semiconductor Inc.
Bit
Name
Functional Description
15-6
#
not used.
5DLBK
(0)
Digital Loopback. If one, then the digital streams (TPOS/TNEG) are looped to RPOS/RNEG.
Data coming out of DSTo will be a delayed version of DSTi. Hence the data path is DSTi through
the Transmitter to RPOS/RNEG and through the receiver to DSTo.
4RLBK
(0)
Remote Loopback. If one, then all timeslots received on RPOS/RNEG are connected to
TPOS/TNEG on the DS1 side of the MT9072. If zero, then this feature is disabled.
3STLBK
(0)
ST-BUS Loopback. If one, then the last bit in the frame and the first 24 timeslots of DSTi are
connected to the last bit in the frame and the first 24 timeslots of DSTo on the ST-BUS side of the
MT9072. If zero, then this feature is disabled. See Loopbacks section.
2PLBK
(0)
Payload Loopback. If one, then all timeslots received on RPOS/RNEG are connected to
TPOS/TNEG on the ST-BUS side of the MT9072. Hence DSTo is looped back to DSTi. If zero,
then this feature is disabled. Set the bit RxDO (YF1 bit 9) for the payload loopback data to
appear at the transmitter output.
1TLU
(0)
TxLoopUp Code. If this bit is set inband line loopup code is sent. The loopup code to be sent is
determined by the Tx Loopup Code register. Note that the receiver will detect either framed or
unframed inband loop codes.
0TLD
(0)
TxLoopDown Code. If this bit is set inband line loopdown code is sent. The loopdown code to
be sent is determined by the Tx LoopDown Code register. If both TLU and TLD are set TLD
takes precedence.
Table 68 - LoopBack Control Word (Y05) (T1)



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