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MT9072AB 数据表(PDF) 119 Page - Zarlink Semiconductor Inc |
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MT9072AB 数据表(HTML) 119 Page - Zarlink Semiconductor Inc |
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119 / 275 page ![]() MT9072 Data Sheet 119 Zarlink Semiconductor Inc. Bit Name Functional Description 15-8 # not used. 7 TESFYEL (0) Transmit ESF Yellow Alarm. Setting this bit(while in ESF Mode) causes a repeating pattern of eight 1’s followed by eight 0’s to be sent on the transmit FDL bits. When JYEL is set, all ones signal is sent on the FDL. 6 TXSECY (0) Transmit Secondary Yellow Alarm. When set to 1, the S-bit for transmit frame 12 will to be set to 1. 5 TD4YEL (0) Transmit D4 Yellow Alarm. When set, bit 2 of all DS0 channels are forced low. The definition of Bit 2 is in accordance with Figure 55. 4 TAIS (1) Transmit All Ones. When low, this control bit forces a framed or unframed (depending on the state of Transmit Alarm Control bit 0) all ones to be transmit at TTIP and TRING. 3 # not used. 2TT1DMY (1) Transmit T1DM Yellow Alarm. If this bit is 0 a T1DM yellow alarm is sent on bit 2 of the 24th timeslot. 1 D4SECY (0) D4 Secondary Alarm. Set this bit for trunks employing the secondary Yellow Alarm. The Fs bit in the 12th frame will not be used for counting errored framing bits. If a one is received in the Fs bit position of the 12th frame a Secondary Yellow Alarm Detect bit will be set. 0SO (0) S-bit Override. If set, this bit forces the S-bits to be inserted as an overlay on any of the following alarm conditions: i) transmit all ones, ii) loop up code insertion, iii) loop down code insertion. Table 65 - Transmit Alarm Control Word(Y02) (T1) Bit Name Functional Description 15-7 # not used. 6 L32Z (0) Digital Loss of Signal Selection. If one, the threshold for digital loss of signal is 32 successive zeros. If zero, the threshold is set to 192 successive zeros. 5 BPVE (0) Bipolar Violation Error Insertion. A zero-to-one transition of this bit inserts a single bipolar violation error into the transmit DS1 data. 4 CRCE (0) CRC-6 Error Insertion. A zero-to-one transition of this bit inserts a single CRC-6 error into the transmit ESF DS1 data. 3FTE (0) Terminal Framing Bit Error Insertion. A zero-to-one transition of this bit inserts a single error into the transmit D4 Ft pattern or the transmit ESF framing bit pattern (in ESF mode). 2FSE (0) Signal Framing Bit Error Insertion. A zero-to-one transition of this bit inserts a single error into the transmit Fs bits (in D4 mode only). 1LOSE (0) Loss of Signal Error Insertion. If one, the MT9072 transmits an all zeros signal (no pulses). Zero code suppression is overridden. If zero, data is transmitted normally. 0 PERR (0) Payload Error Insertion. A zero - to - one transition of this bit inserts a single bit error in the transmit payload. Table 66 - Transmit Error Control Word(Y03) (T1) |
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