AB18X5 Real-Time Clock with Power

Management Family

Date of Issue: October 16, 2014

3.0 x 3.0 mm

Page 7 of 37

Abracon Drawing #453568

Revision: C

4. Package Pins

4.1 Pin Configuration and Connections

Figure 2 and Table 2 show the QFN-16 pin configurations for the AB18X5 parts. Pins labeled NC must be

left unconnected. The thermal pad, pin 17, on the QFN-16 packages must be connected to VSS.

Figure 2. Pin Configuration Diagram

Table 2: Pin Connections

Pin Name

Pin Type

Function

Pin Number

AB1805

AB1815

VSS

Power

Ground

9,17

17

VCC

Power

System power supply

13

13

XI

XT

Crystal input

16

16

XO

XT

Crystal output

15

15

AF

Output

Autocalibration filter

14

14

VBAT

Power

Battery power supply

5

5

SCL

Input

77

SDO

Output

SPI data output

6

SDI

Input

SPI data input

9

nCE

Input

SPI chip select

12

SDA

Input

6

EXTI

Input

External interrupt input

10

10

WDI

Input

Watchdog reset input

2

2

nEXTR

Input

External reset input

3

3

FOUT/nIRQ

Output

Int 1/function output

11

11

nIRQ2

Output

Int 2 output

4

4

CLKOUT/nIRQ3

Output

Int 3/clock output

8

8

nTIRQ

Output

Timer interrupt output

12

nRST

Output

Reset output

1

1

nRST

WDI

nEXTR

FOUT/nIRQ

EXTI

VSS

nTIRQ

1

nRST

WDI

nEXTR

FOUT/nIRQ

EXTI

SDI

nCE

1

PSW/nIRQ2

PSW/nIRQ2

AB1805

AB1815

VSS

PAD

VSS

PAD