AB18X5-RTC datasheet(12/37 Pages) ABRACON

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AB18X5 Real-Time Clock with Power

Management Family

Date of Issue: October 16, 2014

3.0 x 3.0 mm

Page 12 of 37

Abracon Drawing #453568

Revision: C

VBATRST

Falling Battery POR Volt-

age(7)

VBAT Falling

VBAT

Power

POR

VCC < VCCSWF

1.1

1.4

VBMRG

VBAT

Margin

above

VCC(3)

VBAT Static

VBAT Power

200

VBATESR

VBAT supply series resis-

tance(6)

VBAT Static

VBAT Power

1.0

1.5



(1) VCC must be above VCCST to exit the POR state, independent of the VBAT voltage.

(2) Difference between VCCSWR and VCCSWF.

(3) VBAT must be higher than VCC by at least this voltage to ensure the AB18X5 remains in the VBAT Power state.

(4) Maximum VCC falling slew rate to guarantee correct switchover to VBAT Power state. There is no VCC falling slew rate

requirement if switching to the VBAT power source is not required.

(5) VBAT voltage to guarantee correct transition to VBAT Power state when VCC falls.

(6) Total series resistance of the power source attached to the VBAT pin. The optimal value is 1.5k, which may require an

external resistor. VBAT power source ESR + external resistor value = 1.5k



(7) VBATRST is also the static voltage required on VBAT for register data retention.

Table 5: Power Supply and Switchover Parameters

SYMBO

PARAMETER

PWR

TYPE

POWER STATE

TEST

CONDITIONS

MIN

TYP

MAX

UNIT

AB18X5-RTC 数据表(PDF) 12 Page - Abracon Corporation

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