AB18X5 Real-Time Clock with Power

Management Family

Date of Issue: October 16, 2014

3.0 x 3.0 mm

Page 8 of 37

Abracon Drawing #453568

Revision: C

4.2 Pin Descriptions

Table 3 provides a description of the pin connections.

Table 3: Pin Descriptions

Pin Name

Description

VSS

Ground connection. In the QFN-16 packages the ground slug on the bottom of the package must be

connected to VSS.

VCC

Primary power connection. If a single power supply is used, it must be connected to VCC.

VBAT

Battery backup power connection. If a backup battery is not present, VBAT must be connected directly

to VSS, but it may also be used to provide the analog input to the internal comparator (see Analog-

Comparator).

XI

Crystal oscillator input connection.

XO

Crystal oscillator output connection.

AF

Autocalibration filter connection. A 47pF ceramic capacitor must be placed between this pin and VSS

for improved Autocalibration mode timing accuracy.

SCL

resistor is required on this pin.

SDA (only available in

SDO (only available in

SPI environments)

I/O interface SPI data output connection.

SDI

I/O interface SPI data input connection.

nCE (only available in

SPI environments)

I/O interface SPI chip select input connection. It is an active low signal. A pull-up resistor is recom-

mended to be connected to this pin to ensure it is not floating. A pull-up resistor also prevents inadver-

tent writes to the RTC during power transitions.

EXTI

External interrupt input connection. It may be used to generate an External 1 interrupt with polarity

selected by the EX1P bit if enabled by the EX1E bit. The value of the EXTI pin may be read in the EXIN

register bit. This pin does not have an internal pull-up or pull-down resistor and so one must be added

externally. It must not be left floating or the RTC may consume higher current. Instead, it must be con-

nected directly to either VCC or VSS if not used.

WDI

Watchdog Timer reset input connection. It may also be used to generate an External 2 interrupt with

polarity selected by the EX2P bit if enabled by the EX2E bit. The value of the WDI pin may be read in

the WDIN register bit. This pin does not have an internal pull-up or pull-down resistor and so one must

be added externally. It must not be left floating or the RTC may consume higher current. Instead, it

must be connected directly to either VCC or VSS if not used.

nEXTR

External reset input connection. If nEXTR is low and the RS1E bit is set, the nRST output will be driven

to its asserted value as determined by the RSP bit. This pin does not have an internal pull-up or pull-

down resistor and so one must be added externally. It must not be left floating or the RTC may con-

sume higher current. Instead, it must be connected directly to either VCC or VSS if not used.

FOUT/nIRQ

Primary interrupt output connection. This pin is an open drain output. An external pull-up resistor must

be added to this pin. It should be connected to the host device and is used to indicate when the RTC

can be accessed via the serial interface. FOUT/nIRQ may be configured to generate several signals as

a function of the OUT1S field(see 0x11 - Control2). FOUT/nIRQ is also asserted low on a power up

until the AB18X5 has exited the reset state and is accessible via the I/O interface.

1. FOUT/nIRQ can drive the value of the OUT bit.

2. FOUT/nIRQ can drive the inverse of the combined interrupt signal IRQ (see Interrupts).

3. FOUT/nIRQ can drive the square wave output (see 0x13 - SQW) if enabled by SQWE.

4. FOUT/nIRQ can drive the inverse of the alarm interrupt signal AIRQ (see Interrupts).