ADM1034 datasheet(27/40 Pages) AD

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ADM1034

Rev. 0 | Page 27 of 40

Figure 40 shows the fan speed measurement period, assuming

that the fan outputs an ideal TACH signal. In reality, the TACH

signal output by the fan is chopped by the drive signal. However,

since the drive and the TACH signal are synchronized, there is

enough information available for the ADM1034 to measure the

fan speed accurately.

CLOCK

IDEAL

TACH

FAN

MEASUREMENT

PERIOD

Figure 40. Fan Speed Measurement for a 4-Pole Fan

FAN SPEED MEASUREMENT REGISTERS

These 16-bit measurements are stored in the TACH value

registers.

Table 25. TACH Value Registers

Description

Default

0x4A

TACH1 Period, LSB

0xFF

0x4B

TACH1 Period, MSB

0xFF

0x4C

TACH2 Period, LSB

0xFF

0x4D

TACH2 Period, MSB

0xFF

READING FAN SPEED

Reading back fan speeds involves a 2-register read for each

measurement. The low byte should be read first. This freezes the

high byte until both high and low byte registers have been read,

preventing erroneous fan speed measurement readings.

The fan tachometer reading registers report back the number of

12.2 µs period clocks (81.92 kHz oscillator) gated to the fan

speed counter, for one full rotation of the fan, assuming the

correct number of poles is programmed. Since the ADM1034

essentially measures the fan TACH period, the higher the count

value, the slower the actual fan speed. A 16-bit fan TACH

reading of 0xFFFF indicates that the fan has stalled or is

running very slowly (< 75 rpm).

CALCULATING FAN SPEED

Fan speed in rpm is calculated as follows. This assumes that the

number of poles programmed in the Configuration Register 3

(Address 0x03) is correct for both fans.

Fan Speed (RPM) = (81920 × 60)/Fan TACH Reading

where:

Fan TACH Reading = 16-bit Fan TACHometer Reading

Example

TACH1 High Byte (Reg. 0x28) = 0x17

TACH1 Low Byte (Reg. 0x29) = 0xFF

What is Fan 1 speed in rpm?

Fan 1 TACH Reading = 0x17FF = 6143d

RPM = (f × 60) / Fan 1 TACH reading

RPM = (81920 × 60) / 6143

Fan Speed = 800 RPM

ALARM SPEED

The fan ALARM speed (Bit 6) in Status Register 3 (Address 0x51)

is set whenever the fan runs at alarm speed. This occurs if the

device is programmed to run the fan at full speed whenever the

THERM temperature limits are exceeded. The device runs at

alarm speed, for example, if the Boost Disable bit (Bit 1) of the

Configuration 2 Register (Address 0x02) is not set to 1.

Fan Response Register

The ADM1034 fan speed controller operates by reading the

current fan speed, comparing it with the programmed fan

speed, and then updating the drive signal applied to the fan. The

rate at which the ADM1034 looks at and updates the drive

signal is determined by the fan response register. Different fans

have different inertias and respond to a changing drive signal

more or less quickly than others. The fan response register

allows the user to tailor the ADM1034 to a particular fan to

prevent situations like overshoot.

The user programs the number of updates the ADM1034 can

make to the drive signal per second. Table 26 lists the available

options.

Table 26. Fan Response Codes

Code

Update Rate

000

1.25 updates/second

001

2.5 updates/second = default

010

5 updates/second

011

10 updates/second

100

20 updates/second

101

40 updates/second

110

80 updates/second

111

160 updates/second

Table 27. Fan Response Register (Address 0x3C)

Bit No.

Function

Reserved

<6:4>

Fan 2 Response

Reserved

<2:0>

Fan 1 Response

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