PC87310 datasheet(26/52 Pages) NSC

26 / 52 page

40 Functional Description (Continued)

D6 – D0

These bits are reserved for use by the hard disk

controller thus during a read of this register these bits are

TRI-STATE

444 Result Phase Status Registers

The Result Phase of a command contains bytes that hold

status information The format of these bytes are described

below Do not confuse these register bytes with the Main

Status Register which is a read only register that is always

available The Result Phase status registers are read from

the Data Register only during the Result Phase

STATUS REGISTER 0 (ST0)

D7–D6 Interrupt Code

00 e Normal Termination of Command

01 e Abnormal Termination of Command Execu-

tion of Command was started but was not

successfully completed

10 e Invalid Command Issue

Command Issued

was not recognized as a valid command

11 e Ready changed state during the polling mode

D5 Seek End

This bit is set after a Seek or Recalibrate

Command is completed by the Controller (Used during

Sense Interrupt command)

D4 Equipment Check

This bit is set if a Recalibrate Com-

mand or a Track 0 signal failed to occur (Used during

Sense Interrupt command)

D3 Not Used

D2 Head Number

(at end of Execution Phase)

D1 D0 Drive Select

(at end of Execution Phase)

00 e Drive 0 selected 01 e Drive 1 selected

10 e Drive 2 selected 11 e Drive 3 selected

STATUS REGISTER 1 (ST1)

D7 End of Track

This bit is set when the controller trans-

ferred the last byte of the last sector without the TC pin

becoming active The last sector is the End Of Track

sector number programmed in the Command Phase

D6 Not Used

D5 CRC Error

If this bit is set and bit 5 of ST2 is clear

then there was a CRC error in the Address Field of the

correct sector If bit 5 of ST2 is set then there was a

CRC error in the Data Field

D4 Over Run

This bit is set when the controller was not

serviced by the mP soon enough during a data transfer

in the Execution Phase

TABLE 4-14 Maximum Time Allowed to

Service an Interrupt or Acknowledge

a DMA Request in Execution Phase

Data

Time to

Rate

Service

125

620 ms

250

300 ms

500

140 ms

1000

60 ms

Time from rising edge of DRQ or INT to trailing edge of DAK

or RD or WR

D3 Not Used

D2 No Data

This bit is set for any of three possible prob-

lems 1) Controller cannot find the sector specified in

the Command Phase during the execution of a Read

Write or Scan command An address mark was found

however so it is not a blank disk 2) Controller cannot

read any Address Fields without a CRC error during

Read ID command 3) Controller cannot find starting

sector during execution of Read A Track command

D1 Not Writable

This bit is set if the Write Protect pin is

active when a Write or Format command is issued

D0 Missing Address Mark

If this bit is set and if bit 0 of

ST2 is clear then the disk controller cannot detect any

Address Field Address Mark after two disk revolutions

If bit 0 of ST2 is set then the disk controller cannot

detect the Data Field Address Mark

STATUS REGISTER 2 (ST2)

D7 Not Used

D6 Control Mark

This bit is set if the controller tried to

read a sector which contained a deleted data address

mark during execution of Read Data or Scan com-

mands Or if a Read Deleted Data command was exe-

cuted a regular address mark was detected

D5 CRC Error in Data Field

This bit is set if the controller

detected a CRC error in the Data Field Bit 5 of ST1 is

also set

D4 Wrong Track

This bit is only set if the desired sector is

not found and the track number recorded on any sector

of the current track is different from that stored in the

Track Register

D3 Scan Equal Hit

This bit is set if the ‘‘Equal’’ condition

satisfied during any Scan Command

D2 Scan Not Satisfied

This bit is set if the controller can-

not find a sector on the track which meets the desired

condition during Scan Command

D1 Bad Track

This bit is only set if the desired sector is

not found and the track number recorded on any sector

on the track is different from that stored in the Track

D0 Missing Address Mark in Data Field

This bit is set if

the controller cannot find the Data Field Address Mark

during ReadScan command Bit 0 of ST1 is also set

STATUS REGISTER 3 (ST3)

D7 Not Used

D6 Write Protect Status

This bit is the complement of the

associated FDC interface pin for the drive selected in

the DCR

D5 Not Used

D4 Track 0 Status

This bit is the complement of the asso-

ciated FDC interface pin for the drive selected in the

DCR

D3 Not Used

D2 Head Select Status

This bit shows the status of the

associated bit in the Sense Drive Status Command

Phase

D1 D0 Drive Selected (at end of Execution Phase)

These bits show the status of the associated bits in the

Sense Drive Status Command Phase These bits show the

same status as ST0 bits 1 0

00 e Drive 0 selected 01 e Drive 1 selected

10 e Drive 2 selected 11 e Drive 3 selected

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