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6ED003L02-F2 数据表(PDF) 8 Page - Infineon Technologies AG |
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6ED003L02-F2 数据表(HTML) 8 Page - Infineon Technologies AG |
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8 / 20 page ![]() EiceDRIVER™ 6ED003L06-F2, 6ED003L02-F2 datasheet 8 <Revision 2.8>, 05.08.2016 An internal pull-up of about 75 k (negative logic) pre-biases the input during supply start-up and a ESD zener clamp is provided for pin protection purposes. The zener diodes are therefore designed for single pulse stress only and not for continuous voltage stress over 10V. Figure 5 Input filter timing diagram It is anyway recommended for proper work of the driver not to provide input pulse-width lower than 1 µs. The 6ED-F2 driver IC provide additionally a shoot through prevention capability which avoids the simultaneous on-state of two channels of the same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and LO3). When two inputs of a same leg are activated, only one leg output is activated, so that the leg is kept steadily in a safe state. A minimum dead time insertion of typ. 310 ns is also provided, in order to reduce cross-conduction of the external power switches. 3.2 EN (Gate Driver Enable, Pin 10) The signal applied to pin EN controls directly the output stages. All outputs are set to LOW, if EN is at LOW logic level. The internal structure of the pin is given in Figure 6. The switching levels of the Schmitt-Trigger are here VEN,TH+ = 2.1 V and VEN,TH- = 1.3 V. The typical propagation delay time is tEN = 780 ns. There is an internal pull down resistor (75 k ), which keeps the gate outputs off in case of broken PCB connection. Figure 6 EN pin structures 3.3 /FAULT (Fault Feedback, Pin 8) /Fault pin is an active low open-drain output indicating the status of the gate driver (see Figure 7). The pin is active (i.e. forces LOW voltage level) when one of the following conditions occur: Under-voltage condition of VCC supply: In this case the fault condition is released as soon as the supply voltage condition returns in the normal operation range (please refer to VCC pin description for more details). Over-current detection (ITRIP): The fault condition is latched until current trip condition is finished and RCIN input is released (please refer to ITRIP pin). Figure 7 /FAULT pin structures LIN HIN HIN LIN HO LO high low on off on tFILIN tFILIN off on off LO HO VZ= 10.5 V INPUT NOISE FILTER EN IEN+, IEN- VEN,TH+, VEN,TH- 6ED family – 2nd generation FAULT >1 from uv-detection VCC RON,FLT VDD from ITRIP-Latch 6ED family – 2nd generation |
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