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CS8401A-CS 数据表(PDF) 14 Page - List of Unclassifed Manufacturers |
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CS8401A-CS 数据表(HTML) 14 Page - List of Unclassifed Manufacturers |
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14 / 34 page ![]() mode 0, and are read once per channel status block. The second four locations, addresses 0CH to 0FH, provide a cyclic buffer for the last 20 bytes of channel status data. Similar to mode 0, transmitted channel status data will be the same for channel A and chan- nel B (one channel status bit per frame). Flag 1 and flag 2 can be used to monitor this buffer. Flag 1 is set low when byte 0 of channel status data, location 08H, is read and is toggled when every other byte is read. As shown in Figure 13, flag 2 is set high when byte 0, location 08H, is read and set low when byte 4, location 0CH, is read. Flag 2 determines whether the channel status pointer is reading the first four-byte sec- tion or the second four-byte section, while flag 1 indicates which two bytes of the section are free to update. The auxiliary data buffer, locations 10H to 1FH, is read in a cyclic manner similar to the data buffer; however, four auxiliary data bits are transmitted per audio sample (sub-frame). Since the auxiliary buffer must be read four times as often as the user data buffer and is four times as large, flag 0 can be used to monitor both. Buffer Mode 2 In buffer mode 2, two 8-byte buffers are avail- able for buffering both channel A and channel B channel status data independently. Both buffers are identical to the channel status buffer in mode 1 except that each channel can have unique channel status data. The two buffers are read simultaneously with locations 08H to 0FH transmitted in channel A and locations 10H to 17H transmitted in channel B. Figure 5 contains the buffer memory modes and Figure 14 illus- trates the buffer read sequence for mode 2. Flag 0 Flag 1 Flag 2 (Expanded) Block (384 Audio Samples) 08 0B 0C 0F 08 C.S. Address 0 123 4 5678 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 0 1 C.S. Byte Flag 0 08 09 0A 0B 04 05 06 07 04 05 06 07 C.S. Address User Address (Addresses are in Hex) 0F 0C 0F 0C 0F 0C 0F 0C 10 13,14 17 18 1B,1C 1F 10 13,14 17 18 1B,1C 1F Flag 1 Aux. Address Figure 13. CS8401A Buffer Memory Read Sequence - MODE 1 CS8401A 14 DS60F1 |
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