USB3250 datasheet(22/46 Pages) MICROCHIP

22 / 46 page

USB3250

DS00002142A-page 22

 2013 - 2016 Microchip Technology Inc.

The behavior of the Transmit State Machine is described below.

• Asserting a RESET forces the transmit state machine into the Reset state which negates TXREADY. When

RESET is negated the transmit state machine will enter a wait state.

• The SIE asserts TXVALID to begin a transmission.

• After the SIE asserts TXVALID it can assume that the transmission has started when it detects TXREADY has

been asserted.

• The SIE must assume that the PHY has consumed a data byte if TXREADY and TXVALID are asserted on the ris-

ing edge of CLKOUT.

• The SIE must have valid packet information (PID) asserted on the TXDATA bus coincident with the assertion of

TXVALID.

• TXREADY is sampled by the SIE on the rising edge of CLKOUT.

• The SIE negates TXVALID to complete a packet. Once negated, the transmit logic will never reassert TXREADY

until after the EOP has been generated. (TXREADY will not re-assert until TXVALID asserts again).

• The PHY is ready to transmit another packet immediately, however the SIE must conform to the minimum inter-

packet delays identified in the USB 2.0 specification.

FIGURE 7-6:

TRANSMIT TIMING FOR 16-BIT DATA, ODD BYTE COUNT

CLK30

DATA[7:0]

TXREADY

TXVALID

DP/DM

PID

DATA

SYNC

DATA

CRC

PID

DATA[15:8]

DATA (0)

DATA (1)

DATA (2)

DATA (3)

CRC(HI)

CRC (LO)

VALIDH

EOP

USB3250 数据表(PDF) 22 Page - Microchip Technology

USB3250 数据表(HTML) 22 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

数据表下载