USB3250 datasheet(7/46 Pages) MICROCHIP

7 / 46 page

 2013 - 2016 Microchip Technology Inc.

DS00002142A-page 7

USB3250

4.0

INTERFACE SIGNAL DEFINITION

TABLE 4-1:

SYSTEM INTERFACE SIGNALS

Name

Direction

Active Level

Description

RESET

Input

High

Reset. Reset all state machines. After coming out of reset, must

wait 5 rising edges of clock before asserting TXValid for transmit.

Assertion of Reset: May be asynchronous to CLKOUT.

De-assertion of Reset: Must be synchronous to CLKOUT unless

RESET is asserted longer than two periods of CLKOUT.

XCVRSELECT

Input

N/A

Transceiver Select. This signal selects between the FS and HS

transceivers:

0: HS transceiver enabled

1: FS transceiver enabled.

TERMSELECT

Input

N/A

Termination Select. This signal selects between the FS and HS

terminations:

0: HS termination enabled

1: FS termination enabled

SUSPENDN

Input

Low

Suspend. Places the transceiver in a mode that draws minimal

power from supplies. Shuts down all blocks not necessary for

Suspend/Resume operation. While suspended, TERMSELECT

must always be in FS mode to ensure that the 1.5k

 pull-up on

DP remains powered.

0: Transceiver circuitry drawing suspend current

1: Transceiver circuitry drawing normal current

CLKOUT

Output

Rising Edge

System Clock. This output is used for clocking receive and

transmit parallel data at 60MHz (8-bit mode) or 30MHz (16-bit

mode). When in 8-bit mode, this specification refers to CLKOUT

as CLK60. When in 16-bit mode, CLKOUT is referred to as

CLK30.

OPMODE[1:0]

Input

N/A

Operational Mode. These signals select between the various

operational modes:

[1]

[0]

Description

0: Normal Operation

1: Non-driving (all terminations removed)

2: Disable bit stuffing and NRZI encoding

3: Reserved

LINESTATE[1:0]

Output

N/A

Line State. These signals reflect the current state of the USB data

bus in FS mode, with [0] reflecting the state of DP and [1]

reflecting the state of DM. When the device is suspended or

resuming from a suspended state, the signals are combinatoria.

Otherwise, the signals are synchronized to CLKOUT.

[1]

[0]

Description

0: SE0

1: J State

2: K State

3: SE1

DATABUS16_8

Input

N/A

Databus Select. Selects between 8-bit and 16-bit data transfers.

0 8-bit data path enabled. VALIDH is undefined. CLKOUT =

60MHz.

1: 16-bit data path enabled. CLKOUT = 30MHz.

USB3250 数据表(PDF) 7 Page - Microchip Technology

USB3250 数据表(HTML) 7 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

数据表下载

链接网址

USB3250 数据表(PDF) 7 Page - Microchip Technology

USB3250 数据表(HTML) 7 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

数据表 下载

链接网址

数据表下载