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SST25VF080B 数据表(PDF) 9 Page - Microchip Technology

部件名 SST25VF080B
功能描述  8 Mbit SPI Serial Flash
PDF  32 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

SST25VF080B 数据表(HTML) 9 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS20005045C-page 9
SST25VF080B
4.4.3
BYTE-PROGRAM
The Byte-Program instruction programs the bits in the
selected byte to the desired data. The selected byte
must be in the erased state (FFH) when initiating a Pro-
gram operation. A Byte-Program instruction applied to a
protected memory area will be ignored.
Prior to any Write operation, the Write-Enable (WREN)
instruction must be executed. CE# must remain active
low for the duration of the Byte-Program instruction.
The Byte-Program instruction is initiated by executing
an 8-bit command, 02H, followed by address bits [A23-
A0]. Following the address, the data is input in order
from MSB (bit 7) to LSB (bit 0). CE# must be driven
high before the instruction is executed. The user may
poll the Busy bit in the software status register or wait
TBP for the completion of the internal self-timed Byte-
Program operation. See Figure 4-5 for the Byte-Pro-
gram sequence.
FIGURE 4-5:
BYTE-PROGRAM SEQUENCE
4.4.4
AUTO ADDRESS INCREMENT (AAI)
WORD-PROGRAM
The AAI program instruction allows multiple bytes of
data to be programmed without re-issuing the next
sequential address location. This feature decreases
total programming time when multiple bytes or entire
memory array is to be programmed. An AAI Word pro-
gram instruction pointing to a protected memory area
will be ignored. The selected address range must be in
the erased state (FFH) when initiating an AAI Word
Program operation. While within AAI Word Program-
ming sequence, only the following instructions are
valid: for software end-of-write detection—AAI Word
(ADH), WRDI (04H), and RDSR (05H); for hardware
end-of-write detection—AAI Word (ADH) and WRDI
(04H). There are three options to determine the com-
pletion of each AAI Word program cycle: hardware
detection by reading the Serial Output, software detec-
tion by polling the BUSY bit in the software status reg-
ister, or wait TBP. Refer to“End-of-Write Detection” for
details.
Prior to any write operation, the Write-Enable (WREN)
instruction must be executed. Initiate the AAI Word
Program instruction by executing an 8-bit command,
ADH, followed by address bits [A23-A0]. Following the
addresses, two bytes of data are input sequentially,
each one from MSB (Bit 7) to LSB (Bit 0). The first byte
of data (D0) is programmed into the initial address [A23-
A1] with A0=0, the second byte of Data (D1) is pro-
grammed into the initial address [A23-A1] with A0=1.
CE# must be driven high before executing the AAI
Word Program instruction. Check the BUSY status
before entering the next valid command. Once the
device indicates it is no longer busy, data for the next
two sequential addresses may be programmed, fol-
lowed by the next two, and so on.
When programming the last desired word, or the high-
est unprotected memory address, check the busy sta-
tus using either the hardware or software (RDSR
instruction) method to check for program completion.
Once programming is complete, use the applicable
method to terminate AAI. If the device is in Software
End-of-Write Detection mode, execute the Write-Dis-
able (WRDI) instruction, 04H. If the device is in AAI
Hardware End-of-Write Detection mode, execute the
Write-Disable (WRDI) instruction, 04H, followed by the
8-bit DBSY command, 80H. There is no wrap mode
during AAI programming once the highest unprotected
memory address is reached. See Figures 4-8 and 4-9
for the AAI Word programming sequence.
4.4.5
END-OF-WRITE DETECTION
There are three methods to determine completion of a
program cycle during AAI Word programming: hard-
ware detection by reading the Serial Output, software
detection by polling the BUSY bit in the Software Status
Register, or wait TBP. The Hardware End-of-Write
detection method is described in the section below.
1296 ByteProg.0
CE#
SO
SI
SCK
ADD.
01 2 3 4 5 6 7 8
ADD.
ADD.
DIN
02
HIGH IMPEDANCE
15 16
23 24
31 32
39
MODE 0
MODE 3
MSB
MSB
MSB
LSB



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