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STM32F413XG 数据表(PDF) 107 Page - STMicroelectronics |
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STM32F413XG 数据表(HTML) 107 Page - STMicroelectronics |
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107 / 207 page  DocID029162 Rev 2 107/207 STM32F413xG/H Electrical characteristics 174 6.3.8 External clock source characteristics High-speed external user clock generated from an external source In bypass mode the HSE oscillator is switched off and the input pin is a standard I/O. The external clock signal has to respect the Table 58. However, the recommended clock input waveform is shown in Figure 27. Table 39. Low-power mode wakeup timings(1) Symbol Parameter Conditions Min(1) Typ(1) Max(1) Unit tWUSLEEP Wakeup from Sleep mode -- 4 6 clk cycles tWUSLEEPFDSM Flash memory in Deep power down mode - - 50.0 µs tWUSTOP Wakeup from STOP mode Code execution on Flash Main regulator - 12.7 15.0 Main regulator, Flash memory in Deep power down mode - 104.1 120.0 Wakeup from Stop mode, regulator in low power mode(2) - 20.9 28.0 Regulator in low power mode, Flash memory in Deep power down mode(2) - 112.5 130.0 Regulator in low power mode low voltage, Flash memory in Deep power down mode - 112.5 130.0 tWUSTOP Wakeup from STOP mode code execution on RAM(3) Main regulator with Flash in Stop mode or Deep power down(2) -4.2 7.0 Wakeup from Stop mode, regulator in low power mode and Flash in Stop mode or Deep power down - 12.6 20.0 tWUSTDBY Wakeup from Standby mode - - 328.2 400.0 tWUFLASH Wakeup of Flash From Flash_Stop mode - - 11.0 From Flash Deep power down mode - - 40.0 1. Guaranteed by characterization. 2. The specification is valid for wakeup from regulator in low power mode or low power low voltage mode, since the timing difference is negligible. 3. For the faster wakeup time for code execution on RAM, the Flash must be in STOP or DeepPower Down mode (see reference manual RM0430). |
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