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STM32F413XG 数据表(PDF) 25 Page - STMicroelectronics |
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STM32F413XG 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 207 page ![]() DocID029162 Rev 2 25/207 STM32F413xG/H Functional overview 42 3.16 Power supply schemes • VDD = 1.7 to 3.6 V: external power supply for I/Os with the internal supervisor (POR/PDR) disabled, provided externally through VDD pins. Requires the use of an external power supply supervisor connected to the VDD and NRST pins. • VSSA, VDDA = 1.7 to 3.6 V: external analog power supplies for ADC, Reset blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively, with decoupling technique. Note: The VDD/VDDA minimum value of 1.7 V is obtained with the use of an external power supply supervisor (refer to Section 3.17.2: Internal reset OFF). Refer to Table 4: Regulator ON/OFF and internal power supply supervisor availability to identify the packages supporting this option. • VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup registers (through power switch) when VDD is not present. • VDDUSB can be connected either to VDD or an external independent power supply (3.0 to 3.6 V) for USB transceivers. For example, when device is powered at 1.8 V, an independent power supply 3.3V can be connected to VDDUSB. When the VDDUSB is connected to a separated power supply, it is independent from VDD or VDDA but it must be the last supply to be provided and the first to disappear. The following conditions VDDUSB must be respected: – During power-on phase (VDD < VDD_MIN), VDDUSB should be always lower than VDD – During power-down phase (VDD < VDD_MIN), VDDUSB should be always lower than VDD –VDDUSB rising and falling time rate specifications must be respected. – In operating mode phase, VDDUSB could be lower or higher than VDD: – If USB is used, the associated GPIOs powered by VDDUSB are operating between VDDUSB_MIN and VDDUSB_MAX. – If USB is not used, the associated GPIOs powered by VDDUSB are operating between VDD_MIN and VDD_MAX. |
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