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MIC4607 数据表(PDF) 16 Page - Microchip Technology |
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MIC4607 数据表(HTML) 16 Page - Microchip Technology |
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16 / 42 page ![]() MIC4607 DS20005610A-page 16 2016 Microchip Technology Inc. 4.0 TIMING DIAGRAMS 4.1 Non-Overlapping LI/HI Input Mode (MIC4607-1) In non-overlapping LI/HI input mode, enough delay is added between the xLI and xHI inputs to allow xHS to be low before xLI is pulled high and similarly xLO is low before xHI goes high. xHO goes high with a high signal on xHI after a typical delay of 35 ns (tHPLH). xHI going low drives xHO low also with typical delay of 35 ns (tHPHL). Likewise, xLI going high forces xLO high after typical delay of 35 ns (tLPLH) and xLO follows low transition of xLI after typical delay of 35 ns (tLPHL). xHO and xLO output rise and fall times (tR/tF) are typi- cally 20 ns driving 1000 pF capacitive loads. FIGURE 4-1: Separate Non-Overlapping LI/HI Input Mode (MIC4607-1). Note 1: All propagation delays are measured from the 50% voltage level and rise/fall times are measured 10% to 90%. 2: “x” in front of a pin name refers to either A, B or C phase. (e.g. xHI can be either AHI, BHI or CHI). tLPLH tR tLPHL tHPLH tHPHL tF tF tR xHS xHO xLO xHI xLI 0V |
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