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MIC4607 数据表(PDF) 20 Page - Microchip Technology

部件名 MIC4607
功能描述  85V, Three-Phase MOSFET Driver with Adaptive Dead-Time, Anti-Shoot-Through and Overcurrent Protection
PDF  42 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MIC4607 数据表(HTML) 20 Page - Microchip Technology

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MIC4607
DS20005610A-page 20
 2016 Microchip Technology Inc.
5.0
FUNCTIONAL DESCRIPTION
The MIC4607 is a non-inverting, 85V three-phase
MOSFET driver designed to independently drive all six
N-Channel MOSFETs in a three-phase bridge. The
MIC4607 offers a wide 5.5V to 16V VDD operating
supply range with either six independent TTL inputs
(MIC4607-1) or three PWM inputs, one for each phase
(MIC4607-2). Refer to the Functional Diagram section.
The drivers contain input buffers with hysteresis, four
independent UVLO circuits (three high-side and one
low-side), and six output drivers. The high-side output
drivers utilize a high-speed level-shifting circuit that is
referenced to its HS pin. Each phase has an internal
diode that is used by the bootstrap circuits to provide
the drive voltages for each of the three high-side
outputs. A programmable overcurrent protection circuit
turns off all outputs during an overcurrent fault.
5.1
Startup and UVLO
The UVLO circuits force the driver’s outputs low until
the supply voltage exceeds the UVLO threshold. The
low-side UVLO circuit monitors the voltage between
the VDD and VSS pins. The high-side UVLO circuits
monitor the voltage between the xHB and xHS pins.
Hysteresis in the UVLO circuits prevent system noise
and finite circuit impedance from causing chatter during
turn-on.
5.2
Enable Inputs
There is one external enable pin that controls all three
phases. A logic high on the enable pin (EN) allows for
startup of all phases and normal operation. Conversely,
when a logic low is applied on the enable pin, all
phases turn-off and the device enters a low current
shutdown mode. All outputs (xHO and xLO) are pulled
low when EN is low. Do not leave the EN pin floating.
5.3
Input Stage
All input pins (xLI and xHI) are referenced to the VSS
pin. The MIC4607 has a TTL-compatible input range
and can be used with input signals with amplitude less
than the supply voltage. The threshold level is indepen-
dent of the VDD supply voltage and there is no depen-
dence between IVDD and the input signal amplitude.
This feature makes the MIC4607 an excellent level
translator that will drive high level gate threshold MOS-
FETs from a low-voltage PWM IC.
5.4
Low-Side Driver
The low-side driver is designed to drive a ground (VSS
pin) referenced N-channel MOSFET. Low driver
impedances allow the external MOSFET to be turned
on and off quickly. The rail-to-rail drive capability of the
output ensures a low RDSON from the external power
device. Refer to Figure 5-1.
A high level applied to the xLI pin causes VDD to be
applied to the gate of the external MOSFET. A low level
on the xLI pin grounds the gate of the external
MOSFET.
FIGURE 5-1:
Low-Side Driver Block
Diagram.
5.5
High-Side Driver and Bootstrap
Circuit
Figure 5-2 illustrates a block diagram of the high-side
driver and bootstrap circuit. This driver is designed to
drive a floating N-channel MOSFET, whose source ter-
minal is referenced to the HS pin.
FIGURE 5-2:
High-Side Driver and
Bootstrap-Circuit Block Diagram.
A low-power, high-speed, level-shifting circuit isolates
the low side (VSS pin) referenced circuitry from the
high-side (xHS pin) referenced driver. Power to the
high-side driver and UVLO circuit is supplied by the
bootstrap capacitor (CB) while the voltage level of the
xHS pin is shifted high.
The bootstrap circuit consists of an internal diode and
external capacitor, CB. In a typical application, such as
the motor driver shown in Figure 5-3 (only Phase A
illustrated), the AHS pin is at ground potential while the
low-side MOSFET is on. The internal diode charges
capacitor CB to VDD-VF during this time (where VF is
VSS
VDD
LO
EXTERNAL
FET
MIC4607
SWITCH
NODE
HS
HB
HO
EXTERNAL
FET
VDD
CB
MIC4607
LEVEL
SHIFT
VIN
RHS
SWITCH
NODE



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