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T89C5115-RATIM 数据表(PDF) 88 Page - ATMEL Corporation |
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T89C5115-RATIM 数据表(HTML) 88 Page - ATMEL Corporation |
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88 / 105 page  88 T89C5115 4128A–8051–04/02 Table 64. IPL0 Register IPL0 (S:B8h) Interrupt Enable Register Reset Value = X000 0000b bit addressable 76 54 32 1 0 - PPC PT2 PS PT1 PX1 PT0 PX0 Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6 PPC PCA Interrupt Priority bit Refer to PPCH for priority level. 5PT2 Timer 2 overflow interrupt Priority bit Refer to PT2H for priority level. 4PS Serial port Priority bit Referto PSH forpriority level. 3PT1 Timer 1 overflow interrupt Priority bit Refer to PT1H for priority level. 2PX1 External interrupt 1 Priority bit Refer to PX1H for priority level. 1PT0 Timer 0 overflow interrupt Priority bit Refer to PT0H for priority level. 0PX0 External interrupt 0 Priority bit Refer to PX0H for priority level. |
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