T89C5115-RATIM datasheet(21/105 Pages) ATMEL

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T89C5115

4128A–8051–04/02

Data Memory

The T89C5115 provides data memory access in two different spaces:

The internal space mapped in three separate segments:

•

the lower 128 bytes RAM segment.

•

the upper 128 bytes RAM segment.

•

the expanded 256 bytes RAM segment (ERAM).

A fourth internal segment is available but dedicated to Special Function Registers,

SFRs, (addresses 80h to FFh) accessible by direct addressing mode.

Figure 7 shows the internal data memory spaces organization.

Figure 7. Internal Memory – RAM

Internal Space

Lower 128 Bytes RAM

The lower 128 bytes of RAM (see Figure 7) are accessible from address 00h to 7Fh

using direct or indirect addressing modes. The lowest 32 bytes are grouped into 4 banks

of 8 registers (R0 to R7). Two bits RS0 and RS1 in PSW register (see Figure 16) select

which bank is in use according to Table . This allows more efficient use of code space,

since register instructions are shorter than instructions that use direct addressing, and

can be used for context switching in interrupt service routines.

The next 16 bytes above the register banks form a block of bit-addressable memory

space. The C51 instruction set includes a wide selection of single-bit instructions, and

the 128 bits in this area can be directly addressed by these instructions. The bit

addresses in this area are 00h to 7Fh.

256 bytes

Upper

128 bytes

Internal RAM

Lower

128 bytes

Internal RAM

Special

Function

Registers

80h

00h

FFh

00h

FFh

direct addressing

addressing

7Fh

Internal ERAM

direct or indirect

indirect addressing

Table 15. Register Bank Selection

RS1

RS0

Description

T89C5115-RATIM 数据表(PDF) 21 Page - ATMEL Corporation

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