AD8233ACBZ-R7 datasheet(23/30 Pages) AD

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AD8233

Data Sheet

Rev. 0 | Page 22 of 29

APPLICATIONS INFORMATION

ELIMINATING ELECTRODE OFFSETS

The instrumentation amplifier in the AD8233 is designed to

apply gain and to filter out near dc signals simultaneously. This

capability allows the device to amplify a small ECG signal by a

factor of 100 while rejecting electrode offsets as large as ±300 mV.

To achieve offset rejection, connect an RC network between the

output of the instrumentation amplifier, HPSENSE, and

HPDRIVE, as shown in Figure 61.

10kΩ

IAOUT

HPSENSE

HPDRIVE

GM1

GM2

99R

IN+

IN–

VCM

ELECTRODE

OFFSETS

= REFOUT

Figure 61. Eliminating Electrode Offsets

This RC network forms an integrator that feeds any near dc signals

back into the instrumentation amplifier, thus eliminating the offsets

without saturating any node and maintaining high signal gain.

In addition to blocking offsets present across the inputs of the

instrumentation amplifier, this integrator also works as a high-

pass filter that minimizes the effect of slow moving signals, such

as baseline wander. The cutoff frequency of the filter is given by

the following equation:

fC =



100

(1)

where R is in Ω and C is in farads.

Note that the filter cutoff is 100 times higher than is typically

expected from a single-pole filter. Because of the feedback

architecture of the instrumentation amplifier, the typical filter

cutoff equation is modified by a gain of 100 from the

instrumentation amplifier.

0.01

100

0.1

FREQUENCY (Hz)

20dB PER

DECADE

Figure 62. Frequency Response of a Single-Pole DC Blocking Circuit

As with any high-pass filter with low frequency cutoff, a fast

change in dc offset requires a long time to settle. If such a

change saturates the instrumentation amplifier output, the S1

switch briefly enables the 10 kΩ resistor path, thus moving the

cutoff frequency to

fC =

)

(

)

(

100





(2)

For values of R greater than 100 kΩ, the expression in Equation 2

can be approximated by

fC =



200

(3)

This higher cutoff frequency reduces the settling time and

enables faster recovery of the ECG signal. For more

information, see the Fast Restore Circuit section.

HIGH-PASS FILTERING

The AD8233 can implement higher order high-pass filters. A

higher filter order yields better artifact rejection at the cost of

increased signal distortion and more passive components on the

PCB.

Two-Pole High-Pass Filter

A two-pole architecture can be implemented by adding a simple

ac coupling RC at the output of the instrumentation amplifier,

as shown in Figure 63.

10kΩ

IAOUT

HPSENSE

HPDRIVE

+IN

–IN

HPA

10kΩ

REFOUT C3

TO NEXT

STAGE

= REFOUT

Figure 63. Schematic for a Two-Pole High-Pass Filter

Note that the right side of C2 connects to the SW terminal. As

with S1, S2 reduces the recovery time for this ac coupling network

by placing 10 kΩ in parallel with R2. See the Fast Restore

Circuit section for additional details on switch timing and

trigger conditions.

Note that, if this passive network is not buffered, it exhibits

higher output impedance at the input of a subsequent low-pass

filter, such as with Sallen-Key filter topologies. Careful component

selection results in reliable performance without a buffer. See

the Low-Pass Filtering and Gain section for additional

information on component selection.

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