ZSC31150 Datasheet

© 2016 Integrated Device Technology, Inc.

16

December 6, 2016

The analog output AOUT will be activated at the end of the start-up phase depending on the adjusted output and communication mode (refer

to section 2.6). If errors are detected, the Diagnostic Mode (DM) is activated and the diagnostic output signal is driven at the output.

After the start-up phase, the continuously running measurement and calibration cycle is started. Refer to ZSC31150 Bandwidth Calculation

Spreadsheet for detailed information about output update rate.

2.5.3 Conditioning Calculation

The digitalized value for the bridge sensor measurement (acquired raw data) is processed with the correction formula to remove offset and

temperature dependency and to compensate nonlinearity up to 3rd order. The result of the correction calculation is a non-negative 15-bit

value for the bridge sensor in the range [0; 1). This value P is clipped with programmed limitation coefficients and continuously written to the

output register of the digital serial interface and the output DAC.

Note:

The conditioning includes up to third-order nonlinearity sensor input correction. The available adjustment ranges depend on the

specific calibration parameters; for a detailed description, refer to ZSC31150 Functional Description. Basically, offset compensation and linear

correction are only limited by the loss of resolution they will cause. The second-order correction is possible up to approximately 30% of the full

scale difference from a straight line; third order is possible up to approximately 20% (ADC resolution = 13-bit). The calibration principle used

is able to reduce existing nonlinearity errors of the sensor up to 90%. The temperature calibration includes first and second order correction

and should be fairly sufficient in all relevant cases. ADC resolution also influences calibration possibilities; e.g., 1 additional bit of resolution

reduces the calibration range by approximately 50%. The maximum calculation input data width is 14-bit. The 15 or 16 bit ADC resolution

mode uses only a 14-bit segment of the ADC range.

2.6 Analog Output AOUT

one-wire communication interface (OWI). The ZSC31150 supports four different modes of the analog output in combination with the OWI

behavior:



OWIENA:

Analog output is deactivated; OWI communication is enabled.



OWIDIS:

Analog output is active (~2ms after power-on); OWI communication is disabled.



OWIWIN:

Analog output will be activated after the time window;

OWI communication is enabled in a time window of ~500ms (maximum);

transmission of the “START_CM” command must be finished during the time window.



OWIANA:

Analog output will be activated after a ~2ms power on time;

OWI communication is enabled in a time window of ~500ms (maximum);

transmission of the START_CM” command must be finished during time window;

to communicate, the internal driven potential at AOUT must be overwritten

by the external communication master (AOUT drive capability is current limited).

The analog output potential is driven by a unity gain output buffer for which the input signal is generated by a 12.4-bit resistor-string DAC. The

output buffer (BAMP), which is a rail-to-rail op amp, is offset compensated and current limited. Therefore, a short-circuit of the analog output

to ground or the power supply does not damage the ZSC31150.

2.7 Serial Digital Interface

The ZSC31150 includes a serial digital interface (SIF), which is used for communication with the circuit to calibrate the sensor module. The

The OWI can be used to for an “end of line” calibration via the analog output AOUT of the complete assembled sensor module.

Refer to the ZSC31150 Functional Description for a detailed description of the serial interfaces and communication protocols.