AM29F032B datasheet(16/39 Pages) AMD

16 / 39 page

Am29F032B

Note: See Table 5 for program command sequence.

Figure 2.

Program Operation

Sector Erase Command Sequence

Sector erase is a six bus cycle operation. The sector

erase command sequence is initiated by writing two un-

lock cycles, followed by a set-up command. Two addi-

tional unlock write cycles are then followed by the

address of the sector to be erased, and the sector

erase command. The Command Definitions table

shows the address and data requirements for the sec-

tor erase command sequence.

The device does

not require the system to preprogram

the memory prior to erase. The Embedded Erase algo-

rithm automatically programs and verifies the sector for

an all zero data pattern prior to electrical erase. The

system is not required to provide any controls or tim-

ings during these operations.

After the command sequence is written, a sector erase

time-out of 50 µs begins. During the time-out period,

additional sector addresses and sector erase com-

mands may be written. Loading the sector erase buffer

may be done in any sequence, and the number of sec-

tors may be from one sector to all sectors. The time be-

tween these additional cycles must be less than 50 µs,

otherwise the last address and command might not be

accepted, and erasure may begin. It is recommended

that processor interrupts be disabled during this time to

ensure all commands are accepted. The interrupts can

be re-enabled after the last Sector Erase command is

written. If the time between additional sector erase

commands can be assumed to be less than 50 µs, the

system need not monitor DQ3. Any command other

than Sector Erase or Erase Suspend during the

time-out period resets the device to reading array

data. The system must rewrite the command sequence

and any additional sector addresses and commands.

The system can monitor DQ3 to determine if the sector

erase timer has timed out. (See the “DQ3: Sector Erase

Timer” section.) The time-out begins from the rising

edge of the final WE# pulse in the command sequence.

Once the sector erase operation has begun, only the

Erase Suspend command is valid. All other commands

are ignored. Note that a hardware reset during the

sector erase operation immediately terminates the op-

eration. The Sector Erase command sequence should

be reinitiated once the device has returned to reading

array data, to ensure data integrity.

When the Embedded Erase algorithm is complete, the

device returns to reading array data and addresses are

no longer latched. The system can determine the sta-

tus of the erase operation by using DQ7, DQ6, DQ2, or

RY/BY#. Refer to “The Erase Resume command is

valid only during the Erase Suspend mode.” for infor-

mation on these status bits.

Figure 3 illustrates the algorithm for the erase opera-

tion. Refer to the Erase/Program Operations tables in

the “AC Characteristics” section for parameters, and to

the Sector Erase Operations Timing diagram for timing

waveforms.

Erase Suspend/Erase Resume Commands

The Erase Suspend command allows the system to in-

terrupt a sector erase operation and then read data

from, or program data to, any sector not selected for

erasure. This command is valid only during the sector

erase operation, including the 50 µs time-out period

during the sector erase command sequence. The

Erase Suspend command is ignored if written during

the chip erase operation or Embedded Program algo-

rithm. Writing the Erase Suspend command during the

Sector Erase time-out immediately terminates the

time-out period and suspends the erase operation. Ad-

dresses are “don’t-cares” when writing the Erase Sus-

pend command.

When the Erase Suspend command is written during a

sector erase operation, the device requires a maximum

of 20 µs to suspend the erase operation. However,

when the Erase Suspend command is written during

the sector erase time-out, the device immediately ter-

START

Write Program

Command Sequence

Data Poll

from System

Verify Data?

Yes

Last Address?

Yes

Programming

Completed

Increment Address

Embedded

Program

algorithm

in progress

AM29F032B 数据表(PDF) 16 Page - Advanced Micro Devices

AM29F032B 数据表(HTML) 16 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39

数据表下载